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ATmega16U4 Datasheet(PDF) 172 Page - ATMEL Corporation |
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ATmega16U4 Datasheet(HTML) 172 Page - ATMEL Corporation |
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172 / 408 page  172 7766D–AVR–01/09 ATmega16U4/ATmega32U4 • Bits 1:0 - TC49, TC48: Two MSB bits of the 10-bit accesses If 10-bit accuracy is used, the Timer/Counter4 High Byte Register (TC4H) is used for temporary storing the MSB bits (TC49, TC48) of the 10-bit accesses. The same TC4H register is shared between all 10-bit registers within the Timer/Counter4. Note that special procedures must be fol- lowed when accessing the 10-bit TCNT4 register via the 8-bit AVR data bus. These procedures are described in section “Accessing 10-Bit Registers” on page 160. 15.12.8 OCR4A – Timer/Counter4 Output Compare Register A The output compare register A is an 8-bit read/write register. The Timer/Counter Output Compare Register A contains data to be continuously compared with Timer/Counter4. Actions on compare matches are specified in TCCR4A. A compare match does only occur if Timer/Counter4 counts to the OCR4A value. A software write that sets TCNT4 and OCR4A to the same value does not generate a compare match. A compare match will set the compare interrupt flag OCF4A after a synchronization delay follow- ing the compare event. Note that, if 10-bit accuracy is used special procedures must be followed when accessing the internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are described in section “Accessing 10-Bit Registers” on page 160. 15.12.9 OCR4B – Timer/Counter4 Output Compare Register B The output compare register B is an 8-bit read/write register. The Timer/Counter Output Compare Register B contains data to be continuously compared with Timer/Counter4. Actions on compare matches are specified in TCCR4. A compare match does only occur if Timer/Counter4 counts to the OCR4B value. A software write that sets TCNT4 and OCR4B to the same value does not generate a compare match. A compare match will set the compare interrupt flag OCF4B after a synchronization delay follow- ing the compare event. Note that, if 10-bit accuracy is used special procedures must be followed when accessing the internal 10-bit Output Compare Registers via the 8-bit AVR data bus. These procedures are described in section “Accessing 10-Bit Registers” on page 160. 15.12.10 OCR4C – Timer/Counter4 Output Compare Register C Bit 76543210 MSB LSB OCR4A Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial value 00000000 Bit 76543210 MSB LSB OCR4B Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial value 00000000 Bit 76543210 MSB LSB OCR44C Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial value 11111111 |
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