ATmega16U4 datasheet(264/408 Pages) ATMEL

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264

7766D–AVR–01/09

ATmega16U4/ATmega32U4

Figure 21-13. Plug-in Detection Input Block Diagram

The control logic of the VBUS pad outputs a signal regarding the VBUS voltage level:

• The “Session_valid” signal is active high when the voltage on the UVBUS pad is higher or

equal to 1.4V. If lower than 1.4V, the signal is not active.

• The VBUS status bit is set when “Session_valid” signal is active (VBUS > 1.4V).

• The VBUSTI flag is set each time the VBUS state changes.

• The USB peripheral cannot attach to the bus while VBUS bit is not set.

21.10 Registers description

21.10.1

USB general registers

• 7-1 – Reserved

These bits are reserved. Do not modify these bits.

• 0 – UVREGE: USB pad regulator Enable

Set to enable the USB pad regulator. Clear to disable the USB pad regulator.

• 7 – USBE: USB macro Enable Bit

Set to enable the USB controller. Clear to disable and reset the USB controller, to disable the

USB transceiver and to disable the USB controller clock inputs.

• 6 – Reserved

The value read from these bits is always 0. Do not set these bits.

VBUSTI

USBINT.0

VBUS

USBSTA.0

VSS

VDD

Pad logic

Session_valid

Bit

321

UVREGE

UHWCON

Read/Write

R/W

Initial Value

Bit

321

USBE

FRZCLK

OTGPADE

VBUSTE

USBCON

Read/Write

R/W

Initial Value

ATmega16U4 Datasheet(PDF) 264 Page - ATMEL Corporation

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