ATmega3290P datasheet(236/385 Pages) ATMEL

236 / 385 page

236

8021E–AVR–07/09

ATmega329P/3290P

22.4.2

Updating the LCD

Display memory (LCDDR0, LCDDR1, ..), LCD Blanking (LCDBL), Low power waveform

(LCDAB) and contrast control (LCDCCR) are latched prior to every new frame. There are no

restrictions on writing these LCD Register locations, but an LCD data update may be split

between two frames if data are latched while an update is in progress. To avoid this, an interrupt

routine can be used to update Display memory, LCD Blanking, Low power waveform, and con-

trast control, just after data are latched.

In the example below we assume SEG10 and COM1 and SEG4 in COM0 are the only segments

changed from frame to frame. Data are stored in r20 and r21 for simplicity

Note:

1. See Section “5.” on page 9.

22.4.3

Disabling the LCD

In some application it may be necessary to disable the LCD. This is the case if the MCU enters

Power-down mode where no clock source is present.

The LCD should be completely discharged before being disabled. No DC voltage should be left

across any segment. The best way to achieve this is to use the LCD Blanking feature that drives

all segment pins and common pins to GND.

When the LCD is disabled, port function is activated again. Therefore, the user must check that

port pins connected to a LCD terminal are either tri-state or output low (sink).

Assembly Code Example(1)

LCD_update:

; LCD Blanking and Low power waveform are unchanged.

; Update Display memory.

sts

LCDDR0, r20

sts

LCDDR6, r21

ret

C Code Example(1)

Void LCD_update(unsigned char data1, data2);

{

/* LCD Blanking and Low power waveform are unchanged. */

/* Update Display memory. */

LCDDR0 = data1;

LCDDR6 = data2;

}

ATmega3290P Datasheet(PDF) 236 Page - ATMEL Corporation