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ATmega3290P Datasheet(PDF) 239 Page - ATMEL Corporation

Part # ATmega3290P
Description  8-bit Microcontroller with 32K Bytes In-System Programmable Flash
PDF  385 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATmega3290P Datasheet(HTML) 239 Page - ATMEL Corporation

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239
8021E–AVR–07/09
ATmega329P/3290P
• Bit 0 – LCDBL: LCD Blanking
When this bit is written to one, the display will be blanked after completion of a frame. All seg-
ment and common pins will be driven to ground.
22.5.2
LCDCRB – LCD Control and Status Register B
Note:
Bit 3, LCDPM3 is only available in ATmega3290P.
• Bit 7 – LCDCS: LCD Clock Select
When this bit is written to zero, the system clock is used. When this bit is written to one, the
external asynchronous clock source is used. The asynchronous clock source is either
Timer/Counter Oscillator or external clock, depending on EXCLK in ASSR. See ”Asynchronous
Operation of Timer/Counter2” on page 149 for further details.
• Bit 6 – LCD2B: LCD 1/2 Bias Select
When this bit is written to zero, 1/3 bias is used. When this bit is written to one, ½ bias is used.
Refer to the LCD Manufacture for recommended bias selection.
• Bit 5:4 – LCDMUX1:0: LCD Mux Select
The LCDMUX1:0 bits determine the duty cycle. Common pins that are not used are ordinary port
pins. The different duty selections are shown in Table 22-2.
Note:
1. 1/2 bias when LCD2B is written to one and 1/3 otherwise.
• Bits 3:0 – LCDPM3:0: LCD Port Mask
The LCDPM3:0 bits determine the number of port pins to be used as segment drivers. The dif-
ferent selections are shown in Table 22-3. Unused pins can be used as ordinary port pins.
Bit
7
6
5
4
3210
(0xE5)
LCDCS
LCD2B
LCDMUX1
LCDMUX0
LCDPM3
LCDPM2
LCDPM1
LCDPM0
LCDCRB
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0000
Table 22-2.
LCD Duty Select
LCDMUX1
LCDMUX0
Duty
Bias
COM Pin
I/O Port Pin
0
0
Static
Static
COM0
COM1:3
0
1
1/2
1/2 or 1/3(1)
COM0:1
COM2:3
10
1/3
1/2 or 1/3(1)
COM0:2
COM3
11
1/4
1/2 or 1/3(1)
COM0:3
None
Table 22-3.
LCD Port Mask (Values in bold are only available in ATmega3290P)
LCDPM3
LCDPM2
LCDPM1
LCDPM0
I/O Port in Use as
Segment Driver
Maximum Number
of Segments
0
0
0
0
SEG0:12
13
0
0
0
1
SEG0:14
15
0
0
1
0
SEG0:16
17
0
0
1
1
SEG0:18
19



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