AT86RF212 datasheet(13/171 Pages) ATMEL

13 / 171 page

8168B-MCU Wireless-02/09

AT86RF212

4 Microcontroller Interface

4.1 Overview

This section describes the AT86RF212 to microcontroller interface. The interface

comprises a slave SPI and additional control signals; see Figure 4-1. The SPI timing

and protocol are described below.

Figure 4-1. Microcontroller to AT86RF212 Interface

Microcontroller

AT86RF212

/SEL

MOSI

MISO

SCLK

CLKM

IRQ

SLP_TR

MOSI

MISO

SCLK

GPIO1/CLK

GPIO2/IRQ

GPIO3

MOSI

MISO

SCLK

CLKM

IRQ

SLP_TR

/RST

GPIO4

SPI

/SEL

/RST

DIG2

GPIO5

DIG2

Microcontrollers with a master SPI such as Atmel’s AVR family interface directly to the

AT86RF212. The SPI is used for register, Frame Buffer, SRAM, and AES access. The

additional control signals are connected to the GPIO/IRQ interface of the

microcontroller.

Table 4-1 introduces the radio transceiver I/O signals and their functionality.

Table 4-1. Signal Description of Microcontroller Interface

Signal

Description

/SEL

SPI select signal, active low

MOSI

SPI data (Master Output Slave Input) signal

MISO

SPI data (Master Input Slave Output) signal

SCLK

SPI clock signal

CLKM

Clock output, refer to section 7.7.4, usable as:

- microcontroller clock source

- high precision timing reference

- MAC timer reference

IRQ

Interrupt request signal, further used as:

- Frame Buffer Empty indicator, refer to section 9.6.

SLP_TR

Multi purpose control signal, see section 4.6:

- Sleep/Wakeup

- TX start

- disable/enable CLKM

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