2

FN7526.0

November 25, 2009

Pin Configuration

ISL8013A

(16 LD QFN)

TOP VIEW

Ordering Information

PART NUMBER

(Notes 1, 2, 3)

PART

MARKING

TEMP.

RANGE

(°C)

PACKAGE

(Pb-Free)

PKG.

DWG. #

ISL8013AIRZ

80 13AIRZ

-40 to +85

16 Ld 4x4 QFN

L16.4x4

NOTES:

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach

materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both

SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that

meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL8013A. For more information on MSL please

1

3

4

15

VIN

VIN

VDD

SYNCH

16

14 13

2

12

10

9

11

6

57

8

PGND

PGND

SGND

SGND

Refer to Application Note AN1365 for more layout suggestions.

Pin Descriptions

PIN NUMBER

PIN NAME

DESCRIPTION

1, 2

VIN

Input supply voltage. Connect a 10µF ceramic capacitor to power ground.

3

VDD

Input supply voltage for the analog circuitry. Connect to VIN pin.

5

EN

Regulator enable pin. Enable the output when driven to high. Shut down the chip and

discharge output capacitor when driven to low. Do not leave this pin floating.

7

PG

1ms timer output. At power-up or EN HI, this output is a 1ms delayed Power-Good signal

for the output voltage.

4

SYNCH

Mode Selection pin. Connect to logic high or input voltage VDD for PWM mode. Connect

to logic low or ground for PFM mode. Connect to an external function generator for

synchronization with the negative edge trigger. Do not leave this pin floating.

13, 14, 15

LX

Switching node connection. Connect to one terminal of the inductor.

11, 12

PGND

Power ground

9, 10

SGND

Signal ground.

8

VFB

Buck regulator output feedback. Connect to the output through a resistor divider for

adjustable output voltage. For 0.8V output voltage, connect this pin to the output.

6, 16

NC

No connect.

-

Exposed Pad

The exposed pad must be connected to the SGND pin for proper electrical performance.

Place as much vias as possible under the pad connecting to SGND plane for optimal

thermal performance.

ISL8013A