4-/6-/8-Channel, 16-Bit,

Simultaneous-Sampling ADCs

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11

To make use of the input clamps (see Figure 1), con-

voltage source to limit the voltage at the analog input so

that the fault current into the MAX11044/MAX11045/

MAX11046 does not exceed ±20mA. Note that the volt-

age at the analog input pin limits to approximately 7V

during a fault condition so the following equation can

source produces during a fault condition.

Figures 2 and 3 illustrate the clamp circuit voltage-cur-

300mV) range, no current flows in the input clamps.

Once the input voltage goes beyond this voltage range,

the clamps turn on and limit the voltage at the input pin.

R

VV

mA

S

FAULT MAX

_

=

-7

20

MAX11044

MAX11045

MAX11046

CLAMP

S/H

16-BIT ADC

CLAMP

INPUT

SIGNAL

PIN

VOLTAGE

S/H

16-BIT ADC

REF

BUF

CONFIGURATION

REGISTERS

INTERFACE

AND

CONTROL

BANDGAP

REFERENCE

CH0

AVDD

AGNDS

AGND

CH7

SOURCE

DB15

DB0

DB3

DB4

EOC

SHDN

CONVST

CS

RD

WR

DGND

DVDD

RDC

REFIO

INT REF

EXT REF

Figure 1. Required Setup for Clamp Circuit

SIGNAL VOLTAGE AT SOURCE AND PIN (V)

-10

-30

30

10

30

-30

10

-10

-20

20

0

-50

50

AT CH_ INPUT

AT SOURCE

Figure 2. Input Clamp Characteristics

SIGNAL VOLTAGE AT SOURCE AND PIN (V)

-4

-6

246

0

-2

30

-30

10

-10

-20

20

0

-8

8

AT CH_ INPUT

AT SOURCE

Figure 3. Input Clamp Characteristics (Zoom In)