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MAX11046 Datasheet(PDF) 4 Page - Maxim Integrated Products |
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MAX11046 Datasheet(HTML) 4 Page - Maxim Integrated Products |
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4 / 19 page ![]() 4-/6-/8-Channel, 16-Bit, Simultaneous-Sampling ADCs 4 _______________________________________________________________________________________ ELECTRICAL CHARACTERISTICS (continued) (AVDD = +4.75V to +5.25V, DVDD = +2.70V to +5.25V, VAGNDS = VAGND = VDGND = 0V, VREFIO = internal reference, CRDC = 4 x 33µF, CREFIO = 0.1µF, CAVDD = 4 x 0.1µF || 10µF, CDVDD = 3 x 0.1µF || 10µF; all digital inputs at DVDD or DGND, unless otherwise noted, fSAMPLE = 250ksps. TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS MAX11046, DVDD = 3.3V (Note 9) 7.3 mA MAX11045, DVDD = 3.3V (Note 9) 6.3 mA Digital Supply Current IDVDD MAX11044, DVDD = 3.3V (Note 9) 5.5 mA IDVDD 10 Shutdown Current IAVDD 12 µA Power-Supply Rejection Ratio PSRR VAVDD = 4.9V to 5.1V (Note 10) ±3 LSB TIMING CHARACTERISTICS (Note 9) CONVST Rise to EOC tCON Conversion time (Note 11) 3 µs Acquisition Time tACQ 1 1000 µs CS Rise to CONVST Rise tQ Sample quiet time (Note 11) 500 ns CONVST Rise to EOC Rise t0 47 140 ns EOC Fall to CONVST Fall t1 CONVST mode B0 = 0 only (Note 12) 0 ns CONVST Low Time t2 CONVST mode B0 = 1 only 20 ns CS Fall to WR Fall t3 0ns WR Low Time t4 20 ns CS Rise to WR Rise t5 0ns Input Data Setup Time t6 10 ns Input Data Hold Time t7 1ns CS Fall to RD Fall t8 0ns RD Low Time t9 30 ns RD Rise to CS Rise t10 0ns RD High Time t11 10 ns RD Fall to Data Valid t12 35 ns RD Rise to Data Hold Time t13 (Note 12) 5 ns Note 1: See the Definitions section at the end of the data sheet. Note 2: INL is guaranteed at AVDD = 5.25V, for +25°C < TA < +85°C. See the Input Range and Protection section and Typical Operating Characteristics. Note 3: TA = -40°C. Note 4: DNL at code > 8192 or < 57343 (offset binary encoded), or code > -24576 or < +24575 (two’s complement), is guaranteed at AVDD = 5.25V, for +25°C < TA < +85°C. See the Input Range and Protection section and Typical Operating Characteristics. Note 5: DNL at code ≤ 8192 or ≥ 57343 (offset binary encoded), or code ≤ -24576 or ≥ +24575 (2’s complements), is guaranteed at AVDD = 5.25V, for +25°C < TA < +85°C. See the Input Range and Protection section and Typical Operating Characteristics. Note 6: AC dynamics are guaranteed at AVDD = 5.25V, for +25°C < TA < +85°C. See the Input Range and Protection section and Typical Operating Characteristics. Note 7: Tested with alternating channels modulated at full scale and ground. Note 8: See the Input Range and Protection section for more details. Note 9: CLOAD = 30pF on DB0–DB15 and EOC. Inputs (CH0–CH7) alternate between full scale and zero scale. fCONV = 250ksps. All data is read out. Note 10: Defined as the change in positive full scale caused by a ±2% variation in the nominal supply voltage. Note 11: It is recommended that RD, WR, and CS are kept high for the quiet time (tQ) and conversion time (tCON). Note 12: Guaranteed by design. |
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