HT82K74EE datasheet(18/56 Pages) HOLTEK

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HT82K74E/HT82K74EE

Rev. 1.00

December 15, 2009

Input/Output Ports

Holtek microcontrollers offer considerable flexibility on

their I/O ports. With the input or output designation of ev-

ery pin fully under user program control, pull-high op-

tions for all ports and Wake-up option for all I/O pins, the

user is provided with an I/O structure to meet the needs

of a wide range of application possibilities.

The device provides 36-bit bidirectional input/output

lines labeled with port names PA, PB, PC, PD and PE.

These I/O ports are mapped to the Data Memory with

addresses as shown in the Special Purpose Data Mem-

ory table. All of these I/O lines can be used for input and

output operations. For input operation, these ports are

non-latching, which means the inputs must be ready at

the T2 rising edge of instruction

²MOV A,[m]², where m

denotes the port address. For output operation, all the

data is latched and remains unchanged until the output

latch is rewritten.

Pull-high Resistors

Many product applications require pull-high resistors for

their switch inputs usually requiring the use of an exter-

nal resistor. To eliminate the need for these external re-

sistors, I/O pins, when configured as an input have the

capability of being connected to an internal pull-high re-

sistor. The pull-high resistors are selectable via configu-

ration options and are implemented using weak PMOS

transistors.

Port Pin Wake-up

If the HALT instruction is executed, the device will enter

the Power Down Mode, where the system clock will stop

resulting in power being conserved, a feature that is im-

portant for battery and other low-power applications.

Various methods exist to wake-up the microcontroller,

one of which is to change the logic condition on one of

the port pins from high to low or low to high. After a

HALT instruction forces the microcontroller into the

Power Down Mode, the processor will remain in a

low-power state until the logic condition of the selected

wake-up pin on the port pin changes from high to low or

low to high. This function is especially suitable for appli-

cations that can be woken up via external switches.

Each pin on PA (by bit), PB, PC, PD, PE has the capabil-

ity to wake-up (by nibble) the device by falling and rising

edges. It means once there are one pin in is low or high

the I/O cannot wake-up the MCU.

I/O Port Control Registers

Each I/O port has its own control register PAC, PBC,

PCC, PDC and PEC to control the input/output configu-

ration. With this control register, each CMOS output or

input with or without pull-high resistor structures can be

reconfigured dynamically under software control. Each

of the I/O ports is directly mapped to a bit in its associ-

ated port control register.

For the I/O pin to function as an input, the corresponding

bit of the control register must be written as a

²1². This

will then allow the logic state of the input pin to be di-

rectly read by instructions. When the corresponding bit

of the control register is written as a

²0², the I/O pin will

be setup as a CMOS output. If the pin is currently setup

as an output, instructions can still be used to read the

t f

t L O W

t r

t H I G H

t S U : S T A

t H D : S T A

t S P

t H D : D A T

t S U : D A T

t S U : S T O

t B U F

V a l i d

S C L

S D A

O U T

t A A

Data EEPROM Timing Diagrams

t W R

S C L

S D A

8 t h b i t

A C K

W o r d n

S t o p

C o n d i t i o n

S t a r t

C o n d i t i o n

Note:

The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the valid start

condition of sequential command.

HT82K74EE Datasheet(PDF) 18 Page - Holtek Semiconductor Inc

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