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HT82K74EE Datasheet(PDF) 20 Page - Holtek Semiconductor Inc |
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HT82K74EE Datasheet(HTML) 20 Page - Holtek Semiconductor Inc |
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20 / 56 page ![]() HT82K74E/HT82K74EE Rev. 1.00 20 December 15, 2009 the correct value into the port control register or by pro- gramming individual bits in the port control register us- ing the ²SET [m].i² and ²CLR [m].i² instructions. Note that when using these bit control instructions, a read-modify-write operation takes place. The microcontroller must first read in the data on the entire port, modify it to the required new bit values and then re- write this data back to the output ports. All I/O ports have the capability of providing wake-up functions. When the device is in the Power Down Mode, various methods are available to wake the device up. One of these is a transition of any of the selected wake-up pins. Timer/Event Counters The provision of timers form an important part of any microcontroller giving the designer a means of carrying out time related functions. The device contains an inter- nal 16-bit count-up timer which has three operating modes. The timer can be configured to operate as a general timer, external event counter or as a pulse width measurement device. There are three registers related to the Timer/Event Counter, TMRL, TMRH and TMRC. The TMRL/TMRH register pair are the registers that contains the actual timing value. Writing to this register pair places an initial starting value in the Timer/Event Counter preload regis- ter while reading retrieves the contents of the Timer/Event Counter. The TMRC register is a Timer/Event Counter control register, which defines the timer options, and determines how the timer is to be used. The timer clock source can be configured to come from the internal system clock divided by 4 or from an external clock on shared pin PA2/TMR. Configuring the Timer/Event Counter Input Clock Source The timer clock source can originate from either the sys- tem clock divided by 4 or from an external clock source. The system clock divided by 4 is used when the timer is in the timer mode or in the pulse width measurement mode. An external clock source is used when the timer is in the event counting mode, the clock source being provided on shared pin PA2/TMR. Depending upon the condition of the TE bit, each high to low, or low to high transition on the PA2/TMR pin will increment the counter by one. Timer Registers - TMRH, TMRL The TMRH and TMRL registers are two 8-bit special function register locations within the special purpose Data Memory where the actual timer value is stored. The value in the timer counter increases by one each time an internal clock pulse is received or an external transition occurs on the PA2/TMR pin. The timer will count from the initial value loaded by the preload regis- ter to the full count value of FFFFH at which point the timer overflows and an internal interrupt signal gener- ated. The timer value will then be reset with the initial preload register value and continue counting. For a maximum full range count of 0000H to FFFFH the preload registers must first be cleared to 0000H. It should be noted that after power-on the preload regis- ters will be in an unknown condition. Note that if the Timer/Event Counter is not running and data is written to its preload registers, this data will be immediately written into the actual counter. However, if the counter is en- abled and counting, any new data written into the preload registers during this period will remain in the preload registers and will only be written into the actual counter the next time an overflow occurs. Accessing these registers is carried out in a specific way. It must be noted that when using instructions to preload data into the low byte register, namely TMRL, the data will only be placed in a low byte buffer and not directly into the low byte register. The actual transfer of the data into the low byte register is only carried out when a write to its associated high byte register, namely TMRH, is executed. On the other hand, using instruc- tions to preload data into the high byte timer register will result in the data being directly written to the high byte register. At the same time the data in the low byte buffer will be transferred into its associated low byte register. For this reason, when preloading data into the 16-bit timer registers, the low byte should be written first. It T E T M R 1 6 - B i t P r e l o a d R e g i s t e r D a t a B u s R e l o a d O v e r f l o w t o I n t e r r u p t L o w B y t e B u f f e r H i g h B y t e L o w B y t e 1 6 - B i t T i m e r / E v e n t C o u n t e r T O N T i m e r / E v e n t C o u n t e r M o d e C o n t r o l T M 1 T M 0 f S Y S / 4 16-bit Timer/Event Counter Structure |
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