HT82K74EE datasheet(19/56 Pages) HOLTEK

19 / 56 page

HT82K74E/HT82K74EE

Rev. 1.00

December 15, 2009

output register. However, it should be noted that the pro-

gram will in fact only read the status of the output data

latch and not the actual logic status of the output pin.

Pin-shared Functions

The flexibility of the microcontroller range is greatly en-

hanced by the use of pins that have more than one func-

tion. Limited numbers of pins can force serious design

constraints on designers but by supplying pins with

multi-functions, many of these difficulties can be over-

come. The chosen function of the multi-function I/O pins

is set by application program control.

· External Timer Clock Input

The external timer pin TMR is pin-shared with the I/O

pin PA2. To configure this pin to operate as timer input,

the corresponding control bits in the timer control reg-

ister must be correctly set. For applications that do not

require an external timer input, this pin can be used as

a normal I/O pin. Note that if used as a normal I/O pin

the timer mode control bits in the timer control register

must select the timer mode, which has an internal

clock source, to prevent the input pin from interfering

with the timer operation.

· The VA/VB is for V-axis Function

The VA/VB pins are shared with the pins PD0/PD1.

PD0 or PD1 have falling and rising edge wake-up func-

tions if their wake-up function is enabled by the related

configuration option. In the Power-down mode, if PD0

wakes up the MCU, the bit3 named VA_wake-up in the

Wake-up Status Register WSR will be set. Similarly, if

PD1 wakes up the MCU, bit4 named VB_wakeup in the

Wake-up Status Register WSR will be set. If the bit

VA_wake-up or VB_wakeup is read by application pro-

gram, the bit will be cleared.

· The ZA/ZB is for Z-axis function

The ZA/ZB pins are shared with the PD2/PD3, PD2 or

PD3 has falling and rising edge wake-up function if its

wake-up function is enabled by related configuration

option. In halt mode if PD2 wakes up the MCU, the

bit6 named ZA_wakeup in the Wake-up Status Regis-

ter WSR will be set. Similarly, if PD3 wakes up the

MCU, the bit7 named ZB_wake-up in the Wake-up

Status Register WSR will be set. If the bit ZA_wake-up

or ZB_wakeup is read by application program, the bit

will be cleared.

I/O Pin Structures

The diagrams illustrate the I/O pin internal structures. As

the exact logical construction of the I/O pin may differ

from these drawings, they are supplied as a guide only

to assist with the functional understanding of the I/O

pins.

Programming Considerations

Within the user program, one of the first things to con-

sider is port initialisation. After a reset, all of the data and

port control register will be set high. This means that all

I/O pins will default to an input state, the level of which

depends on the other connected circuitry and whether

pull-high options have been selected. If the PAC, PBC,

PCC, PDC and PEC port control registers are pro-

grammed to setup some pins as outputs, these output

pins will have an initial high output value unless the as-

sociated PA, PB, PC, PD and PE port data registers are

first programmed. Selecting which pins are inputs and

which are outputs can be achieved byte-wide by loading

V D D

C o n t r o l B i t

D a t a B u s

W r i t e C o n t r o l R e g i s t e r

C h i p R e s e t

R e a d C o n t r o l R e g i s t e r

W r i t e D a t a R e g i s t e r

D a t a B i t

C K

W a k e - u p f o r a n y I / O p o r t

R e a d D a t a R e g i s t e r

W a k e - u p o p t i o n f o r a n y I / O p o r t

P u l l - H i g h

O p t i o n

W e a k

P u l l - u p

P u l l - L o w

P A 2 / T M R

P A O u t p u t

C o n f i g u r a t i o n

I / O P o r t

Input/Output Ports

T 1

T 2

T 3

T 4

T 1

T 2

T 3

T 4

W r i t e t o P o r t

R e a d f r o m P o r t

S y s t e m C l o c k

P o r t D a t a

Read/Write Timing

HT82K74EE Datasheet(PDF) 19 Page - Holtek Semiconductor Inc

HT82K74EE Datasheet(HTML) 19 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL