ST7522 datasheet(39/45 Pages) SITRONIX

39 / 45 page

ST7522

Ver 1.0c

39/45

2002/07/10

80 Interface

(Ta = –40 to 85°C )

VDD=2.7 to 4.5V

Rating

VDD=4.5 to 5.5V

Rating

Item

Signal

Symbol

Condition

Min.

Max.

Min.

Max.

Units

Address hold time

tAH8

—

Address setup time

tAW8

—

System cycle time

tCYC8

—

3400

—

1300

—

Control L pulse width (WR

—

)

—

tCCLW

350

—

160

—

Control L pulse width (RD

—

)

—

tCCLR

530

—

200

—

Control H pulse width (WR

—

)

—

tCCHW

1100

—

1100

—

Control H pulse width (RD

—

)

—

tCCHR

—

730

—

530

—

Data setup time

tDS8

—

Address hold time

D0 to D7

tDH8

—

access time

tACC8

—

Output disable time

D0 to D7

tOH8

CL = 100 pF

—

1200

—

1100

*1 All timing is specified using 20% and 80% of VDD as the reference.

tCCLW and tCCLR are specified as the overlap between CS1

―

being “L” (CS2 = “H”) and WR

―

and RD

―

being at the “L” level.

tAW8

tAH8

tDS8

tDH8

tACC8

tOH8

tCCLR,tCCLW

tCYC8

tCCHR,tCCHW

D0 to D7

(Write)

D0 to D7

(Read)

CS1

CS2

WR,RD

ST7522 Datasheet(PDF) 39 Page - Sitronix Technology Co., Ltd.

ST7522 Datasheet(HTML) 39 Page - Sitronix Technology Co., Ltd.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

Datasheet Download

Link URL