ST7522

Ver 1.0c

22/45

2002/07/10

Write Display Data

A0

RD

―

WR

―

D7

D6

D5

D4

D3

D2

D1

D0

1

1

0

Write data

Writes 8-bits of data into the display data RAM, at a location specified by the contents of the column address and page,

address registers and then increments the column address register by one.

Read Display Data

A0

RD

―

WR

―

D7

D6

D5

D4

D3

D2

D1

D0

1

0

1

Read data

Reads 8-bits of data from the data I/O latch, updates the contents of the I/O latch with display data from the display data

RAM location specified by the contents of the column address and page address registers and then increments the column

address register.

After loading a new address into the column address register one dummy read is required before valid data is obtained.

Start line set

A0

RD

―

WR

―

D7

D6

D5

D4

D3

D2

D1

D0

0

1

0

0

1

0

Display start address

Loads the RAM line address of the initial display line, COM 0,into the initial display line register. The RAM display data becomes

the top line of the LCD screen. It is followed by the higher number lines in ascending order, corresponding to the duty cycle. The

screen can be scrolled using this command by incrementing the line address.(default value=”00H”)

Select ADC

A0

RD

―

WR

―

D7

D6

D5

D4

D3

D2

D1

D0

0

1

0

1

0

1

0

0

0

0

A

The command selects the relationship between display data RAM column addresses and segment drivers.

A=1: SEG0 ← column address 5FH, … inverted

A=0: SEG0 ← column address 00H, … normal (default)

This command is provided to reduce restrictions on the placement of driver ICs and routing of traces during printed circuit

Board design. See Figure 4 for a table of segments and column addresses for the two values of D.