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ST7625 Datasheet(PDF) 17 Page - Sitronix Technology Co., Ltd. |
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ST7625 Datasheet(HTML) 17 Page - Sitronix Technology Co., Ltd. |
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17 / 160 page  ST7625 Ver 1.6 17/160 2008/07 7. FUNCTIONAL DESCRIPTION 7.1 MICROPROCESSOR INTERFACE Chip Select Input /CS pin is chip selection. The ST7625 is active when /CS=L. In serial interface mode, the internal shift register and the counter are reset when /CS=H. 7.1.1 Selecting Parallel / Serial Interface ST7625 has six types of interface with an MPU, which are two serial and four parallel interfaces. The parallel or serial interface is determined by IF pin as shown in Table 7.1.1. Table 7.1.1 Parallel / Serial Interface Mode I/F Mode Pin Assignment IF1 IF2 IF3 I/F Description /CS A0 E_RD RW_WR D15 to D8 D7 to D2 D0 D1 H H H 80 serial 16-bit parallel /CS A0 /RD /WR D15 ~ D8 D7 ~ D2 D0 D1 H H L 80 serial 8-bit parallel /CS A0 /RD /WR -- D7 ~ D2 D0 D1 H L L 68 serial 16-bit parallel /CS A0 E R/W D15 ~ D8 D7 ~ D2 D0 D1 L H H 68 serial 8-bit parallel /CS A0 E R/W -- D7 ~ D2 D0 D1 L L L 8-bit SPI mode (4 line) /CS SCL -- -- -- -- SI A0 L L H 9-bit SPI mode (3 line) /CS SCL -- -- -- -- SI -- NOTE: When these pins are set to any other combination, A0, E_RD and RW_WR inputs are disabled and D0 to D15 are high impedance. 7.1.2 8-bit or 16-bit Parallel Interface The ST7625 identifies the type of the data bus signals according to the combination of A0, /RD (E) and /WR (W/R) signals, as shown in Table 7.1.2. Table 7.1.2 Parallel Data Transfer Common 6800-series 8080-series A0 R/W E /WR /RD Description H H ↑ H ↓ Display data read out H H ↑ H ↓ Register status read L L ↓ ↑ H Insturction write H L ↓ ↑ H Display data write |
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