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DM9102DEP Datasheet(PDF) 30 Page - Davicom Semiconductor, Inc. |
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DM9102DEP Datasheet(HTML) 30 Page - Davicom Semiconductor, Inc. |
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30 / 70 page ![]() 30 Final Version: DM9102D-DS-F01 May 10, 2006 Bit Name Default Description 31:9 Reserved FFFFFFH, RO Reserved 8:4 Reserved 0,RO Reserved 3:0 PHYST XXXX ,RW PHY Status bit 3:Internal PHY Link status (the same as bit2 of PHY Register) bit 2:Full-duplex bit 1:Speed 100Mbps link bit 0:Speed 10Mbps link |
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