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AM1707 Datasheet(PDF) 154 Page - Texas Instruments |
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AM1707 Datasheet(HTML) 154 Page - Texas Instruments |
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154 / 198 page ![]() AM1707 SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010 www.ti.com 6.24.3 I2C Electrical Data/Timing 6.24.3.1 Inter-Integrated Circuit (I2C) Timing Table 6-89 and Table 6-90 assume testing over recommended operating conditions (see Figure 6-63 and Figure 6-64). Table 6-89. I2C Input Timing Requirements No. PARAMETER MIN MAX UNIT Standard Mode 10 1 tc(SCL) Cycle time, I2Cx_SCL ms Fast Mode 2.5 Standard Mode 4.7 2 tsu(SCLH-SDAL) Setup time, I2Cx_SCL high before I2Cx_SDA low ms Fast Mode 0.6 Standard Mode 4 3 th(SCLL-SDAL) Hold time, I2Cx_SCL low after I2Cx_SDA low ms Fast Mode 0.6 Standard Mode 4.7 4 tw(SCLL) Pulse duration, I2Cx_SCL low ms Fast Mode 1.3 Standard Mode 4 5 tw(SCLH) Pulse duration, I2Cx_SCL high ms Fast Mode 0.6 Standard Mode 250 6 tsu(SDA-SCLH) Setup time, I2Cx_SDA before I2Cx_SCL high ns Fast Mode 100 Standard Mode 0 7 th(SDA-SCLL) Hold time, I2Cx_SDA after I2Cx_SCL low ms Fast Mode 0 0.9 Standard Mode 4.7 8 tw(SDAH) Pulse duration, I2Cx_SDA high ms Fast Mode 1.3 Standard Mode 1000 9 tr(SDA) Rise time, I2Cx_SDA ns Fast Mode 20 + 0.1Cb 300 Standard Mode 1000 10 tr(SCL) Rise time, I2Cx_SCL ns Fast Mode 20 + 0.1Cb 300 Standard Mode 300 11 tf(SDA) Fall time, I2Cx_SDA ns Fast Mode 20 + 0.1Cb 300 Standard Mode 300 12 tf(SCL) Fall time, I2Cx_SCL ns Fast Mode 20 + 0.1Cb 300 Standard Mode 4 13 tsu(SCLH-SDAH) Setup time, I2Cx_SCL high before I2Cx_SDA high ms Fast Mode 0.6 Standard Mode N/A 14 tw(SP) Pulse duration, spike (must be suppressed) ns Fast Mode 0 50 Standard Mode 400 15 Cb Capacitive load for each bus line pF Fast Mode 400 154 Peripheral Information and Electrical Specifications Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM1707 |
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