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AM1707 Datasheet(PDF) 166 Page - Texas Instruments |
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AM1707 Datasheet(HTML) 166 Page - Texas Instruments |
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166 / 198 page  AM1707 SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010 www.ti.com Table 6-96. Universal Serial Bus OTG (USB0) Registers (continued) BYTE ADDRESS ACRONYM REGISTER DESCRIPTION 0x01E0 053B HOST_TXINTERVAL Sets the polling interval for Interrupt/ISOC transactions or the NAK response timeout on Bulk transactions for host Transmit endpoint. 0x01E0 053C HOST_RXTYPE Sets the operating speed, transaction protocol and peripheral endpoint number for the host Receive endpoint. 0x01E0 053D HOST_RXINTERVAL Sets the polling interval for Interrupt/ISOC transactions or the NAK response timeout on Bulk transactions for host Receive endpoint. CONTROL AND STATUS REGISTER FOR ENDPOINT 4 0x01E0 0540 TXMAXP Maximum Packet Size for Peripheral/Host Transmit Endpoint 0x01E0 0542 PERI_TXCSR Control Status Register for Peripheral Transmit Endpoint (peripheral mode) HOST_TXCSR Control Status Register for Host Transmit Endpoint (host mode) 0x01E0 0544 RXMAXP Maximum Packet Size for Peripheral/Host Receive Endpoint 0x01E0 0546 PERI_RXCSR Control Status Register for Peripheral Receive Endpoint (peripheral mode) HOST_RXCSR Control Status Register for Host Receive Endpoint (host mode) 0x01E0 0548 RXCOUNT Number of Bytes in Host Receive endpoint FIFO 0x01E0 054A HOST_TXTYPE Sets the operating speed, transaction protocol and peripheral endpoint number for the host Transmit endpoint. 0x01E0 054B HOST_TXINTERVAL Sets the polling interval for Interrupt/ISOC transactions or the NAK response timeout on Bulk transactions for host Transmit endpoint. 0x01E0 054C HOST_RXTYPE Sets the operating speed, transaction protocol and peripheral endpoint number for the host Receive endpoint. 0x01E0 054D HOST_RXINTERVAL Sets the polling interval for Interrupt/ISOC transactions or the NAK response timeout on Bulk transactions for host Receive endpoint. DMA REGISTERS 0x01E0 1000 DMAREVID DMA Revision Register 0x01E0 1004 TDFDQ DMA Teardown Free Descriptor Queue Control Register 0x01E0 1008 DMAEMU DMA Emulation Control Register 0x01E0 1800 TXGCR[0] Transmit Channel 0 Global Configuration Register 0x01E0 1808 RXGCR[0] Receive Channel 0 Global Configuration Register 0x01E0 180C RXHPCRA[0] Receive Channel 0 Host Packet Configuration Register A 0x01E0 1810 RXHPCRB[0] Receive Channel 0 Host Packet Configuration Register B 0x01E0 1820 TXGCR[1] Transmit Channel 1 Global Configuration Register 0x01E0 1828 RXGCR[1] Receive Channel 1 Global Configuration Register 0x01E0 182C RXHPCRA[1] Receive Channel 1 Host Packet Configuration Register A 0x01E0 1830 RXHPCRB[1] Receive Channel 1 Host Packet Configuration Register B 0x01E0 1840 TXGCR[2] Transmit Channel 2 Global Configuration Register 0x01E0 1848 RXGCR[2] Receive Channel 2 Global Configuration Register 0x01E0 184C RXHPCRA[2] Receive Channel 2 Host Packet Configuration Register A 0x01E0 1850 RXHPCRB[2] Receive Channel 2 Host Packet Configuration Register B 0x01E0 1860 TXGCR[3] Transmit Channel 3 Global Configuration Register 0x01E0 1868 RXGCR[3] Receive Channel 3 Global Configuration Register 0x01E0 186C RXHPCRA[3] Receive Channel 3 Host Packet Configuration Register A 0x01E0 1870 RXHPCRB[3] Receive Channel 3 Host Packet Configuration Register B 0x01E0 2C00 DMA_SCHED_CTRL DMA Scheduler Control Register 0x01E0 2D00 ENTRY[0] DMA Scheduler Table Word 0 0x01E0 2D04 ENTRY[1] DMA Scheduler Table Word 1 . . . . . . . . . 0x01E0 2DFC ENTRY[63] DMA Scheduler Table Word 63 QUEUE MANAGER REGISTERS 0x01E0 4000 QMGRREVID Queue Manager Revision Register 166 Peripheral Information and Electrical Specifications Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): AM1707 |
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