TPS22941 datasheet(14/19 Pages) TI

14 / 19 page

TPS22941, TPS22942, TPS22943, TPS22944, TPS22945

SLVS832C – NOVEMBER 2008 – REVISED NOVEMBER 2009

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Output Capacitor

A 0.1-

μF capacitor, COUT, should be placed between VOUT and GND. This capacitor will prevent parasitic board

inductances from forcing VOUT below GND when the switch turns off. For the TPS2294x, the total output

capacitance needs to be kept below a maximum value, COUT(max), to prevent the part from registering an

over-current condition and turning-off the switch. The maximum output capacitance can be determined from the

following formula, COUT = ILIM(MAX) x tBLANK(MIN) ÷ VIN

Due to the integral body diode in the PMOS switch, a CIN greater than COUT is highly recommended. A COUT

greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current

flow through the body diode from VOUT to VIN.

Power Dissipation

During normal operation as a switch, the power dissipation is small and has little effect on the operating

temperature of the part. The parts with the higher current limits will dissipate the most power and that will only

be,

P = (ILIM)

2 × r

ON = (0.2)

2 × 0.4 = 16 mW when V

IN= 5.5 V

If the part goes into current limit the maximum power dissipation will occur when the output is shorted to ground.

For TPS22941/2/5, the power dissipation scales by the auto-restart time (tRESTART) and the overcurrent blanking

time (tBLANK) so that the maximum power dissipated is:

P(max) = (tBLANK ÷ (tRESTART + tBLANK)) × (VIN(max)) × ILIM(max) = (10 ÷ (80 + 10) × 5.5 × 0.2 = 122 mW

When using the TPS22943 and TPS22944, a short on the output causes the part to operate in a constant current

state, dissipating a worst-case power as calculated above until the thermal shutdown activates. It then cycles in

and out of thermal shutdown so long as the ON pin is active and the short is present.

Board Layout

For best performance, all traces should be as short as possible. To be most effective, the input and output

capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have

on normal and short-circuit operation. Using wide traces for VIN, VOUT, and GND will help minimize parasitic

electrical effects along with minimizing the case to ambient thermal impedance.

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Product Folder Link(s): TPS22941 TPS22942 TPS22943 TPS22944 TPS22945

TPS22941 Datasheet(PDF) 14 Page - Texas Instruments