10F222 datasheet(34/86 Pages) MICROCHIP

34 / 86 page

PIC10F220/222

DS41270E-page 32

7.9

A/D Acquisition Requirements

For the ADC to meet its specified accuracy, the charge

holding capacitor (CHOLD) must be allowed to fully

charge to the input channel voltage level. The Analog

Input model is shown in Figure 7-1. The source

impedance (RS) and the internal sampling switch (RSS)

impedance directly affect the time required to charge the

capacitor CHOLD. The sampling switch (RSS) impedance

varies over the device voltage (VDD), see Figure 7-1.

The maximum recommended impedance for analog

sources is 10 k

Ω. As the source impedance is

decreased, the acquisition time may be decreased.

After the analog input channel is selected (or changed),

an A/D acquisition must be done before the conversion

can be started. To calculate the minimum acquisition

time, Equation 7-1 may be used. This equation

assumes that 1/2 LSb error is used (256 steps for the

ADC). The 1/2 LSb error is the maximum error allowed

for the ADC to meet its specified resolution.

EQUATION 7-1:

ACQUISITION TIME EXAMPLE

FIGURE 7-1:

ANALOG INPUT MODULE

Note 1: The charge holding capacitor (CHOLD) is not discharged after each conversion.

2: The maximum recommended impedance for analog sources is 10 k

Ω. This is required to meet the pin

leakage specification.

Assumptions:

Temperature = 50°C and external impedance of 10 k

Ω 5.0V VDD

Tacq

= Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient

=TAMP + TC + TCOFF

μs + TC + [(Temperature - 25°C)(0.05 μs/°C)]

Solving for Tc:

= CHOLD (RIC + RSS + RS) In(1/512)

= -25pF (l k

Ω + 7 kΩ + 10 kΩ ) In(0.00196)

=2.81

μs

Therefore:

Tacq

= 2

μs + 2.81 μs + [(50°C-25°C)(0.0 5μs/°C)]

=6.06

μs

CPIN

ANx

5 pF

VDD

VT = 0.6V

I LEAKAGE

RIC

≤ 1k

Sampling

Switch

Rss

CHOLD = 25 pF

VSS/VREF-

Sampling Switch

567 8 9 10 11

Ω)

VDD

± 500 nA

RSS

Legend:

CPIN

= Input Capacitance

= Threshold Voltage

ILEAKAGE

= Leakage current at the pin due

to various junctions

RIC

= Interconnect Resistance

= Sampling Switch

CHOLD

= Sample/Hold Capacitance

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