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DRV8800RTYR Datasheet(PDF) 6 Page - Texas Instruments |
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DRV8800RTYR Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 26 page  Charge Pump nFAULT PHASE GND nSLEEP ENABLE OUT SENSE VCP GND CP2 CP1 OUT VBB VBB 3.3K .22 uf .1 uf .1 uf 100 uf .1 uf VREG MODE Low-Side Gate Supply Control Logic Motor lead Protection Bias Supply PAD VDD 3.3K VBB OUT+ OUT- SENSE UVLO STB STG TSD Optional + - DRV8800 DRV8801 SLVS855D – JULY 2008 – REVISED APRIL 2010 www.ti.com DRV8800 FUNCTIONAL BLOCK DIAGRAM 6 Submit Documentation Feedback Copyright © 2008–2010, Texas Instruments Incorporated Product Folder Link(s): DRV8800 DRV8801 |
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