PCA9530_3

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 03 — 26 February 2009

4 of 24

NXP Semiconductors

PCA9530

The last bit of the address byte defines the operation to be performed. When set to logic 1

a read is selected, while a logic 0 selects a write operation.

6.2 Control register

Following the successful acknowledgement of the slave address, the bus master will send

a byte to the PCA9530, which will be stored in the Control register.

The lowest 3 bits are used as a pointer to determine which register will be accessed.

If the Auto-Increment flag is set, the three low order bits of the Control register are

automatically incremented after a read or write. This allows the user to program the

registers sequentially. The contents of these bits will rollover to ‘000’ after the last register

is accessed.

When Auto-Increment flag is set (AI = 1) and a read sequence is initiated, the sequence

must start by reading a register different from the Input register (B2 B1 B0

≠ 0 0 0).

Only the 3 least significant bits are affected by the AI flag. Unused bits must be

programmed with zeroes.

6.2.1 Control register definition

Reset state: 00h

Fig 5.

Control register

002aae500

0

0

0

AI

0

B2

B1

B0

register address

Auto-Increment flag

Table 3.

Register summary

B2

B1

B0

Symbol

Access

Description

0

0

0

INPUT

read only

input register

0

0

1

PSC0

read/write

frequency prescaler 0

0

1

0

PWM0

read/write

PWM register 0

0

1

1

PSC1

read/write

frequency prescaler 1

1

0

0

PWM1

read/write

PWM register 1

1

0

1

LS0

read/write

LED selector