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SC16C751B Datasheet(PDF) 4 Page - NXP Semiconductors |
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SC16C751B Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 32 page ![]() SC16C751B_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 10 October 2008 4 of 32 NXP Semiconductors SC16C751B 5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs 5.2 Pin description Table 2. Pin description Symbol Pin Type Description A0 14 I Register select. A0 to A2 are used during read and write operations to select the UART register to read from or write to. Refer to Table 3 for register addresses. A1 13 I A2 12 I CS 6 I Chip select. When CS is LOW, the UART is selected. CTS 18 I Clear to send. CTS is a modem status signal. Its condition can be checked by reading bit 4 (CTS) of the Modem Status Register (MSR). MSR[3] ( ∆CTS) indicates that CTS has changed states since the last read from the MSR. If the modem status interrupt is enabled when CTS changes levels and the auto-CTS mode is not enabled, an interrupt is generated. CTS is also used in the auto-CTS mode to control the transmitter. D0 20 I/O Data bus. Eight data lines with 3-state outputs provide a bidirectional path for data, control and status information between the UART and the CPU. D1 21 I/O D2 22 I/O D3 23 I/O D4 24 I/O D5 1 I/O D6 2 I/O D7 3 I/O INT 15 O Interrupt. When active (HIGH), INT informs the CPU that the UART has an interrupt to be serviced. Four conditions that cause an interrupt to be issued are: a receiver error, received data that is available or timed out (FIFO mode only), an empty transmitter holding register or an enabled modem status interrupt. INT is reset (deactivated) either when the interrupt is serviced or as a result of a Master Reset. RESET 17 I Master Reset. When active (HIGH), RESET clears most UART registers and sets the levels of various output signals. IOR 11 I Read input. When IOR is active (LOW) while the UART is selected, the CPU is allowed to read status information or data from a selected UART register. RTS 16 O Request to send. When active, RTS informs the modem or data set that the UART is ready to receive data. RTS is set to the active level by setting the RTS Modem Control Register bit and is set to the inactive (HIGH) level either as a result of a Master Reset or during Loopback mode operations or by clearing bit 1 (RTS) of the MCR. In the auto-RTS mode, RTS is set to the inactive level by the receiver threshold control logic. RX 4 I Serial data input. RX is serial data input from a connected communications device. TX 5 O Serial data output. TX is composite serial data output to a connected communication device. TX is set to the marking (HIGH) level as a result of Master Reset. VDD 19 power 2.5 V, 3 V or 5 V supply voltage. VSS[1] 10 power Ground voltage. |
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