LTC3615 datasheet(4/32 Pages) LINER

4 / 32 page

LTC3615

3615f

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

jSW1–SW2

Output Phase Shift Between SW1

and SW2

VPHASE < 0.15 • SVIN

Deg

0.35 • SVIN < VPHASE < 0.65 • SVIN

Deg

VPHASE > 0.85 • SVIN

180

Deg

VSRLIM

Voltage at SRLIM to Enable DDR

Mode

(Note 9)

SVIN – 0.3

VMODE

(Note 9)

Internal Burst Mode Operation

0.3

Pulse-Skipping Mode

SVIN – 0.3

Forced Continuous Mode

1.1

SVIN • 0.58

External Burst Mode Operation

0.5

0.85

PGOOD

Power Good Voltage Windows

TRACK/SSx = SVIN, Entering Window

VFBx Ramping Up

VFBx Ramping Down

–3.5

3.5

–6

TRACK/SSx = SVIN, Leaving Window

VFBx Ramping Up

VFBx Ramping Down

–9

–11

tPGOOD

Power Good Blanking Time

Entering/Leaving Window

105

140

µs

RPGOOD

Power Good Pull-Down On-Resistance I = 10mA

VRUN

Enable Pin

Input High

Input Low

0.4

Pull-Down Resistance

MΩ

elecTrical characTerisTics

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3615 is tested under pulsed load conditions such that

TJ ≈ TA. The LTC3615E is guaranteed to meet performance specifications

over the 0°C to 85°C operating junction temperature range. Specifications

over the –40°C to 125°C operating junction temperature range are

assured by design, characterization and correlation with statistical process

controls. The LTC3615I is guaranteed to meet specifications over the

full –40°C to 125°C operating junction temperature range. Note that

the maximum ambient temperature is determined by specific operating

conditions in conjunction with board layout, the rated package thermal

resistance and other environmental factors. Note that the maximum

ambient temperature consistent with these specifications is determined by

specific operating conditions in conjunction with board layout, the rated

package thermal impedance and other environmental factors. The junction

temperature (TJ, in °C) is calculated from the ambient temperature

(TA, in °C) and power dissipation (PD, in watts) according to the formula:

TJ = TA + (PD • θJA)

where

θJA (in °C/W) is the package thermal impedence.

Note 3: This parameter is tested in a feedback loop which servos VFB1,2 to

the midpoint for the error amplifier (VITH1,2 = 0.75V).

Note 4: External compensation on ITH pin.

Note 5: Tying the ITH pin to SVIN enables internal compensation and AVP

mode for the selected channel.

Note 6: Dynamic supply current is higher due to the internal gate charge

being delivered at the switching frequency.

Note 7: See description of the TRACK/SS pin in the Pin Functions section.

Note 8: When sourcing current, the average output current is defined

as flowing out of the SW pin. When sinking current, the average output

current is defined as flowing into the SW pin. Sinking mode requires the

use of forced continuous mode.

Note 9: See description of the MODE pin in the Pin Functions section.

Note 10: Guaranteed by design and correlation to wafer level

measurements for QFN packages.

Note 11: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the specified maximum operating junction

temperature may impair device reliability or permanently damage the

device.

The l denotes the specifications which apply over the full operating

junction temperature range, otherwise specifications are at TA = 25°C (Note 2), SVIN = PVINx = 3.3V, RT = 178k, RSRLIM = 40.2k, unless

otherwise specified (Notes 1, 2, 11).

LTC3615 Datasheet(PDF) 4 Page - Linear Technology

LTC3615 Datasheet(HTML) 4 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL