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68HC705PD6 Datasheet(PDF) 13 Page - Motorola, Inc |
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68HC705PD6 Datasheet(HTML) 13 Page - Motorola, Inc |
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13 / 165 page ![]() July 7, 1997 GENERAL RELEASE SPECIFICATION MC68HC05PD6 GENERAL DESCRIPTION MOTOROLA REV 1.1 1-1 SECTION 1 GENERAL DESCRIPTION The MC68HC05PD6 is a member of the MC68HC05 family of HCMOS Microcontroller Units (MCUs). This sophisticated 80-pin MCU has 16k-bytes of user ROM, 512 bytes of RAM, and eight parallel ports. Ports A, B, C, F, G, and H have eight I/O pins, port D and E have 8 output-only pins. The MC68HC05PD6 includes a Time Base circuit, 8 and 16-bit timers, a COP Watchdog timer, LCD drivers, serial communication interface and P-Decoder. It is targeted for communication applications such as pagers. 1.1 FEATURES • Industry standard M68HC05 8-bit CPU core • 16400 bytes of user ROM • 512 bytes of user RAM (64 bytes for stack) • 48 bidirectional I/O lines • 16 output-only lines • 16-bit timer with Input Capture and Output Compare functions • COP Watchdog timer • Serial Communication Interface (SCI) • LCD drivers (3 or 4 backplane drivers) x (1 to 36 frontplane drivers) • On-chip Time Base circuits • Dual oscillators (76.8kHz and 4MHz) and selectable system clock frequency • 24-hour Real Time Clock • 8-bit Event counter / Modulus clock divider • Key Wake-up Interrupt with 8-bit input • P-Decoder • Two IRQ inputs • Available in 80-pin TQFP package |
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