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56F8036 Datasheet(PDF) 82 Page - Freescale Semiconductor, Inc |
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56F8036 Datasheet(HTML) 82 Page - Freescale Semiconductor, Inc |
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82 / 164 page ![]() 56F8036 Data Sheet, Rev. 6 82 Freescale Semiconductor Figure 6-1 SIM Register Map Summary Add. Offset Address Acronym 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 $0 SIM_ CTRL R 0 0 0 0 0 0 0 0 0 0 ONCE EBL0 SW RST STOP_ DISABLE WAIT_ DISABLE W $1 SIM_ RSTAT R 0 0 0 0 0 0 0 0 0 SWR COP_ TOR COP_ LOR EXTR POR 0 0 W $2 SIM_SWC0 R Software Control Data 0 W $3 SIM_SWC1 R Software Control Data 1 W $4 SIM_SWC2 R Software Control Data 2 W $5 SIM_SWC3 R Software Control Data 3 W $6 SIM_MSHID R 0 0 0 0 0 0 0 1 1 1 1 1001 0 W $7 SIM_LSHID R 1 0 0 0 0 0 0 0 0 0 0 1110 1 W $8 SIM_PWR R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LRSTDBY W Reserved $A SIM_ CLKOUT R 0 0 0 0 0 0 PWM3PWM2PWM1PWM0 1 0 0 0 0 0 W $B SIM_PCR R 0 TMRA_ CR PWM_C R I2C_ CR 0 0 0 0 0 0 0 0 0 0 0 0 W $C SIM_PCE0 R CMPB CMPA DAC1 DAC0 0 ADC 0 0 0 I2C 0 QSCI0 0 QSPI0 0 PWM W $D SIM_PCE1 R 0 PIT2 PIT1 PIT0 0 0 0 0 0 0 0 0 TA3 TA2 TA1 TA0 W $E SIM_SD0 R CMPB_ SD CMPA_ SD DAC1_ SD DAC0_ SD 0 ADC_ SD 0 0 0 I2C_ SD 0 QSCI0 _SD 0 QSPI0 _SD 0 PWM_ SD W $F SIM_SD1 R 0 PIT2_ SD PIT1_S D PIT0_ SD 0 0 0 0 0 0 0 0 TA3_ SD TA2_ SD TA1_ SD TA0_ SD W $10 SIM_IOSAHI R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ISAL[23:22] W $11 SIM_IOSALO R ISAL[21:6] W $12 SIM_PROT R 0 0 0 0 0 0 0 0 0 0 0 0 PCEP GIPSP W $13 SIM_GPSA0 R 0 0 0 GPS_ A6 GPS_A5 GPS_A4 0 0 0 0 0 0 0 0 W $14 SIM_GPSA1 R 0 0 0 0 0 0 0 0 0 0 0 0 GPS_A9 GPS_A8 W $15 SIM_GPSB0 R 0 GPS_B6 GPS_B5 0 0 0 GPS_B3 GPS_B2 0 GPS_ B1 0 GPS_ B0 W $16 SIM_GPSB1 R 0 0 0 0 0 0 0 0 0 0 0 GPS_ B9 0 GPS_ B8 0 GPS_ B7 W $17 SIM_GPSCD R 0 0 0 GPS_ D5 0 0 0 0 0 0 0 0 0 0 0 0 W $18 SIM_IPS0 R 0 0 IPS0_ FAULT2 0 IPS0_ FAULT1 0 0 IPS0_PSRC2 IPS0_PSRC1 IPS0_PSRC0 W $19 SIM_IPS1 R 0 0 0 0 0 0 0 0 0 IPS1_DSYNC1 0 IPS1_DSYNC0 W $1A SIM_IPS2 R 0 0 0 IPS2_ TA3 0 0 0 IPS2_ TA2 0 0 0 IPS2_ TA1 0 0 0 0 W Reserved 0 = Read as 0 1 = Read as 1 = Reserved |
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