OPA330 datasheet(12/30 Pages) TI

12 / 30 page

OPA330

OPA2330

OPA4330

SBOS432D – AUGUST 2008 – REVISED JUNE 2010

www.ti.com

PHOTOSENSITIVITY

The QFN and DFN package can be easily mounted

using standard PCB assembly techniques. See

Although the OPA330 YFF package has a protective

Application

Note

QFN/SON

PCB

Attachment

backside coating that reduces the amount of light

(SLUA271) and Application Report Quad Flatpack

exposure on the die, unless fully shielded, ambient

No-Lead Logic Packages (SCBA017), both available

light can reach the active region of the device. Input

for download at www.ti.com.

bias current for the package is specified in the

absence of light. Depending on the amount of light

The exposed leadframe die pad on the bottom of

exposure in a given application, an increase in bias

the package should be connected to V–.

current, and possible increases in offset voltage

should

expected.

Fluorescent

lighting

may

QFN AND DFN LAYOUT GUIDELINES

introduce noise or hum because of the time-varying

The leadframe die pad should be soldered to a

light output. Best layout practices include end-product

thermal pad on the PCB. A mechanical data sheet

packaging that provides shielding from possible light

showing an example layout is attached at the end of

sources during operation.

this data sheet. Refinements to this layout may be

required based on assembly process requirements.

QFN AND DFN PACKAGES

Mechanical drawings located at the end of this data

The OPA4330 is offered in a QFN package. The

sheet list the physical dimensions for the package

OPA2330 is available in a DFN-8 package (also

and pad. The five holes in the landing pattern are

known as SON), which is a QFN package with lead

optional, and are intended for use with thermal vias

contacts on only two sides of the bottom of the

that connect the leadframe die pad to the heatsink

package. These leadless, near-chip-scale packages

area on the PCB.

maximize board space and enhance thermal and

Soldering the exposed pad significantly improves

electrical characteristics through an exposed pad.

board-level reliability during temperature cycling, key

QFN and DFN packages are physically small, have a

push, package shear, and similar board-level tests.

smaller routing area, improved thermal performance,

Even

with

applications

that

have

low-power

and improved electrical parasitics, with a pinout

dissipation, the exposed pad must be soldered to the

scheme that is consistent with other commonly-used

PCB to provide structural integrity and long-term

packages, such as SOIC and MSOP. Additionally, the

reliability.

absence

external

leads

eliminates

bent-lead

issues.

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Product Folder Link(s): OPA330 OPA2330 OPA4330

OPA330 Datasheet(PDF) 12 Page - Texas Instruments

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