ADS5484 datasheet(22/37 Pages) TI

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CLKP

CLKM

ADS548x

SquareWaveor

SineWave

0.01 F

S0168-08

ADS5484

ADS5485

SLAS610C – AUGUST 2008 – REVISED OCTOBER 2009 ............................................................................................................................................... www.ti.com

Clock Inputs

The ADS548x equivalent clock input circuit is shown in Figure 37. The clock inputs can be driven with either a

differential clock signal or a single-ended clock input, but differential is highly recommended. The characterization

of the ADS548x is typically performed with a 3-VPP differential clock, but the ADC performs well with a differential

clock amplitude down to ~1 VPP, as shown in Figure 39 and Figure 40 . The performance is optimized when the

clock amplitude is kept above 2 VPP. The clock amplitude becomes more of a factor in performance as the

analog input frequency increases. When single-ended clocking is a necessity, it is best to connect CLKM to

ground with a 0.01-

μF capacitor, while CLKP is ac-coupled with a 0.01-μF capacitor to the clock source, as

shown in Figure 38.

Figure 37. Clock Input Circuit

Figure 38. Single-Ended Clock

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