ADS6445 datasheet(49/80 Pages) TI

49 / 80 page

fIN − Input Frequency − MHz

−6

−5

−4

−3

−2

−1

100

200

300

400

500

600

700

G073

ADS6445, ADS6444

ADS6443, ADS6442

www.ti.com

SLAS531B – MAY 2007 – REVISED DECEMBER 2009

Figure 83. Analog Input Bandwidth (represented by magnitude of TF_ADC, see Figure 85 )

Drive Circuit Requirements

For optimum performance, the analog inputs must be driven differentially. This improves the common-mode

noise immunity and even order harmonic rejection.

A 5-

Ω resistor in series with each input pin is recommended to damp out ringing caused by the package

parasitics. It is also necessary to present low impedance (< 50

Ω) for the common mode switching currents. For

example, this is achieved by using two resistors from each input terminated to the common mode voltage (VCM).

In addition to the above, the drive circuit may have to be designed to provide a low insertion loss over the

desired frequency range and matched impedance to the source. While doing this, the ADC input impedance has

to be taken into account. Figure 84 shows that the impedance (Zin, looking into the ADC input pins) decreases at

high input frequencies. The smith chart shows that the input impedance is capacitive and can be approximated

by a series R-C upto 500 MHz.

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ADS6445 Datasheet(PDF) 49 Page - Texas Instruments