ADS6445 datasheet(21/80 Pages) TI

21 / 80 page

ADS6445, ADS6444

ADS6443, ADS6442

www.ti.com

SLAS531B – MAY 2007 – REVISED DECEMBER 2009

Table 14. Serial Register B

BITS

(1)

ADDRESS

A4 - A0

D10

INPUT CLOCK BUFFER GAIN CONTROL

(1)

After a hardware or software reset, all register bits are cleared to 0.

D6 - D2

<CLKIN GAIN> Input clock buffer gain control

11000

Gain 0, minimum gain

00000

Gain 1, default gain after reset

01100

Gain 2

01010

Gain 3

01001

Gain 4

01000

Gain 5, maximum gain

Table 15. Serial Register C

BITS

(1)

ADDRESS

A4 - A0

D10

<DF>

DATA

DORMAT 2S

COMP OR

TEST PATTERNS

STRAIGHT

BINARY

(1)

After a hardware or software reset, all register bits are cleared to 0.

D7 - D5

<PATTERNS> Capture test patterns

000

Normal ADC operation

001

Output all zeros

010

Output all ones

011

Output toggle pattern

100

Unused

101

Output custom pattern (contents of CUSTOM pattern registers 0x0B and 0x0C)

110

Output DESKEW pattern (serial stream of 1010..)

111

Output SYNC pattern

<DF> Data format selection

2s Complement format

Straight binary format

Submit Documentation Feedback

Product Folder Link(s): ADS6445, ADS6444 ADS6443, ADS6442

ADS6445 Datasheet(PDF) 21 Page - Texas Instruments

ADS6445 Datasheet(HTML) 21 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80

Datasheet Download

Link URL