CDCM61002 datasheet(23/35 Pages) TI

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CDCM61002

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SCAS870D – FEBRUARY 2009 – REVISED JULY 2010

The CDCM61002 start-up time limits, tMAX and tMIN, can be calculated as follows:

tMAX = tpuh + trsu + tdelay + tVCO_CAL + tPLL_LOCK

tMIN = tpul + trsu + tdelay + tVCO_CAL + tPLL_LOCK

Power Considerations

As a result of the different possible configurations of the CDCM61002, Table 11 is intended to provide enough

information on the estimated current consumption of the device. Unless otherwise noted, VCC = 3.3 V and TA =

+25°C.

Table 11. Estimated Block Power Consumption

EXTERNAL

RESISTOR

POWER

CURRENT CONSUMPTION

IN-DEVICE POWER DISSIPATION

DISSIPATION

BLOCK

CONDITION

(mA)

(mW)

Entire device,

Output off, no termination

214.5

core current

resistors

LVPECL output, active mode

42.4

LVCMOS output pair, static

4.5

14.85

LVCMOS output pair,

Output buffer

transient, 'CL' load, 'f' MHz

V × fOUT × (CL + 20 × 10

–12) × 103

V2 × fOUT × (CL + 20 × 10

–12) × 103

output frequency

LVDS output, active mode

Divide enabled, divide = 1

16.5

Divide enabled, divide = 2

Divide circuitry

Divide enabled, divide = 3, 4

49.5

Divide enabled, divide = 6, 8

From Table 11, the current consumption can be calculated for any configuration. For example, the current for the

entire device with one LVPECL output in active mode can be calculated by adding up the following blocks: core

current, LVPECL output buffer current, and the divide circuitry current. The overall in-device power consumption

can also be calculated by summing the in-device power dissipated in each of these blocks.

As an example scenario, let us consider the use case of a crystal input frequency of 25 MHz and device output

frequency of 312.5 MHz in LVPECL mode. For this case, the typical overall power dissipation can be calculated

as:

3.3 V × (65 + 2 × 28 + 10) mA = 429 mW

Because the LVPECL output has external resistors and the power dissipated by these resistors is 50 mW, the

typical overall in-device power dissipation is:

439 mW – 2 × 50 mW = 339 mW

When the LVPECL output is active, the average voltage is approximately 1.9 V on each output as calculated

from the LVPECL VOH and VOL specifications. Therefore, the power dissipated in each emitter resistor is

approximately (1.9 V)2/150

Ω = 25 mW.

When the LVCMOS output is active and drives a load capacitance, CL, the overall LVCMOS output current

consumption is the sum of a static pre-driver current and a dynamic switching current (which is a function of the

output frequency and the load capacitance).

Let us consider another use case of a crystal input frequency of 26.5625 MHz and device output frequency of

212.5 MHz in LVCMOS mode and driving a 5-pF load capacitance. For this case, the typical overall power

dissipation can be calculated as:

3.3 V × (65 + 15 + 2 × 21.4) mA = 405.24 mW

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