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TPS780 Datasheet(PDF) 15 Page - Texas Instruments |
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TPS780 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 27 page  Powering the MSP430 Microcontroller LDO GND V IN V OUT 1 F m 1 F m MSP430 V SS V CC I/O V =3.0V CC 5mA Active Mode 3.0V 1.6 AI LPM3/SleepMode m Q TPS780 GND V IN V OUT MSP430 V SS V CC I/O V =3.6V CC 5mA Active Mode 700nAI LPM3/SleepMode Q V =2.2V CC Current 1 F m 1 F m 2.2Vto3.6V V SET TPS780 Series www.ti.com ....................................................................................................................................................... SBVS083C – JANUARY 2007 – REVISED MAY 2008 Several versions of the TPS780 are ideal for powering the MSP430 microcontroller. Table 3 shows potential applications of some voltage versions. Table 3. Typical MSP430 Applications VOUT(HIGH) VOUT(LOW) DEVICE (TYP) (TYP) APPLICATION VOUT, MIN > 1.800V required by many MSP430s. Allows TPS780360200 3.6V 2.0V lowest power consumption operation. VOUT, MIN > 2.200V required by some TPS780360220 3.6V 2.2V MSP430s FLASH operation. VOUT, MIN > 2.700V required by some TPS780360300 3.6V 3.0V MSP430s FLASH operation. Figure 56. Typical LDO without DVS VOUT, MIN < 3.600V required by some TPS780360220 3.6V 2.2V MSP430s. Allows highest speed operation. The TPS780 family offers many output voltage versions to allow designers to optimize the supply voltage for the processing speed required of the MSP430. This flexible architecture minimizes the supply current consumed by the particular MSP430 application. The MSP430 total system power can be reduced by substituting the 500nA IQ TPS780 series LDO in place of an existing ultra-low IQ LDO (typical best case = 1 µA). Additionally, DVS allows for increasing the clock speed in active mode (MSP430 VCC = 3.6V). The 3.6V VCC reduces the MSP430 time in active mode. In low-power mode, MSP430 system power can be further reduced by lowering the MSP430 VCC to 2.2V in sleep mode. Key features of the TPS780 series are an ultralow quiescent current (500nA), DVS, and miniaturized packaging. The TPS780 family are available in Figure 57. TPS780 with Integrated DVS SON-6 and TSOT-23 packages. Figure 56 shows a typical MSP430 circuit powered by an LDO without DVS. Figure 57 is an MSP430 circuit using a TPS780 The other benefit of DVS is that it allows a higher VCC LDO that incorporates an integrated DVS, thus voltage on the MSP430, increasing the clock speed simplifying the circuit design. In a circuit without DVS, and reducing the active mode dwell time. as Figure 56 illustrates, VCC is always at 3.0V. When the MSP430 goes into sleep mode, VCC remains at 3.0V; if DVS is applied, VCC could be reduced in sleep mode. In Figure 57, the TPS780 LDO with integrated DVS maintains 3.6V VCC until a logic high signal from the MSP430 forces VOUT to level shift VOUT from 3.6V down to 2.2V, thus reducing power in sleep mode. Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback 15 |
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