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AM1707 Datasheet(PDF) 76 Page - Texas Instruments

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Part # AM1707
Description  ARM Microprocessor
PDF  199 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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AM1707 Datasheet(HTML) 76 Page - Texas Instruments

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AM1707
SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010
www.ti.com
6.12.1 Interfacing to SDRAM
The EMIFB supports a glueless interface to SDRAM devices with the following characteristics:
•
Pre-charge bit is A[10]
•
Supports 8, 9, 10 or 11 column address bits
•
Supports up to 13 row address bits
•
Supports 1, 2 or 4 internal banks
Table 6-24 shows the supported SDRAM configurations for EMIFB.
Table 6-24. EMIFB Supported SDRAM Configurations(1)
SDRAM
Memory
Memory
Number of
EMIFB Data
Total Memory
Total Memory
Data Bus
Rows
Columns
Banks
Density
Memories
Bus Size
(Mbits)
(Mbytes)
Width
(Mbits)
(bits)
1
32
13
8
1
64
8
64
1
32
13
8
2
128
16
128
1
32
13
8
4
256
32
256
1
32
13
9
1
128
16
128
1
32
13
9
2
256
32
256
1
32
13
9
4
512
64
512
32
1
32
13
10
1
256
32
256
1
32
13
10
2
512
64
512
1
32
13
10
4
1024
128
1024
1
32
13
11
1
512
64
512
1
32
13
11
2
1024
128
1024
1
32
13
11
4
2048
256
2048
2
32
13
8
1
64
8
32
2
32
13
8
2
128
16
64
2
32
13
8
4
256
32
128
2
32
13
9
1
128
16
64
2
32
13
9
2
256
32
128
2
32
13
9
4
512
64
256
16
2
32
13
10
1
256
32
128
2
32
13
10
2
512
64
256
2
32
13
10
4
1024
128
512
2
32
13
11
1
512
64
256
2
32
13
11
2
1024
128
512
2
32
13
11
4
2048
256
1024
(1)
The shaded cells indicate configurations that are possible on the EMIFB interface but as of this writing SDRAM memories capable of
supporting these densities are not available in the market.
Figure 6-21 shows an interface between the EMIFB and a 2M × 16 × 4 bank SDRAM device. In addition,
Figure 6-22 shows an interface between the EMIFB and a 2M × 32 × 4 bank SDRAM device and
Figure 6-23 shows an interface between the EMIFB and two 4M × 16 × 4 bank SDRAM devices. Refer to
Table 6-25 , as an example that shows additional list of commonly-supported SDRAM devices and the
required connections for the address pins. Note that in Table 6-25, page size/column size (not indicated in
the table) is varied to get the required addressability range.
76
Peripheral Information and Electrical Specifications
Copyright © 2010, Texas Instruments Incorporated
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