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AM1707 Datasheet(PDF) 28 Page - Texas Instruments

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Part # AM1707
Description  ARM Microprocessor
PDF  199 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM1707 Datasheet(HTML) 28 Page - Texas Instruments

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AM1707
SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010
www.ti.com
3.6.15 Multichannel Audio Serial Ports (McASP0, McASP1, McASP2)
Table 3-17. Multichannel Audio Serial Ports (McASPs) Terminal Functions
PIN
No.
SIGNAL NAME
TYPE(1)
PULL(2)
MUXED
DESCRIPTION
ZKB
McASP0
EMA_WE_DQM[0]/UHPI_HINT/AXR0[15]/GP2[9]
M14
I/O
IPU
EMIFA, UHPI,
EMA_WE_DQM[1]/UHPI_HDS2/AXR0[14]/GP2[8]
P12
I/O
IPU
GPIO
EMA_OE/UHPI_HDS1/AXR0[13]/GP2[7]
R7
I/O
IPU
EMIFA, UHPI,
EMA_WE/UHPI_HRW/AXR0[12]/GP2[3]/BOOT[14]
M13
I/O
IPU
GPIO, BOOT
AXR0[11]/ AXR2[0]/GP3[11]
A5
I/O
IPD
McASP2, GPIO
UART1_TXD/AXR0[10]/GP3[10]
D6
I/O
IPD
GPIO
UART1_RXD/AXR0[9]/GP3[9]
C6
I/O
IPD
GPIO
McASP0 serial
AXR0[8]/MDIO_D/GP3[8]
B6
I/O
IPU
MDIO, GPIO
data.
AXR0[7]/MDIO_CLK/GP3[7]
A6
I/O
IPD
AXR0[6]/RMII_RXER/ACLKR2/GP3[6]
D7
I/O
IPD
AXR0[5]/RMII_RXD[1]/AFSX2/GP3[5]
C7
I/O
IPD
AXR0[4]/RMII_RXD[0]/AXR2[1]/GP3[4]
B7
I/O
IPD
EMAC,
AXR0[3]/RMII_CRS_DV/AXR2[2]/GP3[3]
A7
I/O
IPD
McASP2, GPIO
AXR0[2]/RMII_TXEN/AXR2[3]/GP3[2]
D8
I/O
IPD
AXR0[1]/RMII_TXD[1]/ACLKX2/GP3[1]
C8
I/O
IPD
AXR0[0]/RMII_TXD[0]/AFSR2/GP3[0]
B8
I/O
IPD
McASP2, USB,
McASP1 transmit
AHCLKX0/AHCLKX2/USB_REFCLKIN/GP2[11]
B5
I/O
IPD
GPIO
master clock.
McASP0 transmit
ACLKX0/ECAP0/APWM0/GP2[12]
C5
I/O
IPD
eCAP0, GPIO
bit clock.
McASP0 transmit
AFSX0/GP2[13]/BOOT[10]
D5
I/O
IPD
GPIO, BOOT
frame sync.
EMAC, GPIO,
McASP0 receive
AHCLKR0/RMII_MHZ_50_CLK/GP2[14]/BOOT[11]
A4
I/O
IPD
BOOT
master clock.
McASP0 receive
ACLKR0/ECAP1/APWM1/GP2[15]
B4
I/O
IPD
eCAP1, GPIO
bit clock.
McASP0 receive
AFSR0/GP3[12]
C4
I/O
IPD
GPIO
frame sync.
McASP0 mute
AMUTE0/RESETOUT
L4
I/O
IPD
RESETOUT
output.
(1)
I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2)
IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor
28
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