SC120 datasheet(23/32 Pages) SEMTECH

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SC120

accumulates with each successive cycle in the burst. The

result is that the output load current that can be sup-

ported in PSAVE under this high V

condition will be

greater than occurs if the 240mA current limit can be

enforced. Therefore the PSAVE exit load due to the first

exit criterion (Figure 2) can increase significantly. This

phenomenon is advantageous. Reverting to PWM opera-

tion with high V

can result in V

OUT

rising above V

REG

, due

to the PWM minimum duty cycle. PSAVE operation avoids

this voltage rise because of its hysteretic voltage-thresh-

old on/off control. If the load remains low enough to

remain in PSAVE, V

can approach and even slightly

exceed V

OUT

. To initally enter PSAVE mode, the initial

startup load must be small enough to cause discontinu-

ous mode PWM operation. This PSAVE mode startup load

upper limit can be increased if needed by reducing the

inductance. (Refer to the Inductor Selection section.)

Sufficiently large output capacitance will prevent PSAVE

exit due to the second exit criterion (Figure 3).

PSAVE V

OUT

ripple may increase due to parasitic capaci-

tance on the external FB pin network. If using external

feedback programming, it is prudent to add a small capaci-

tor between OUT and FB to the circuit board layout. When

operating the SC120 in the final configuration in PSAVE,

observe the amplitude of PSAVE ripple. If the ripple

exceeds 50mV for the expected range of input voltage, a

small-value capacitor should be tried. Capacitance on the

order of a few picofarads is often sufficient to bring the

ripple amplitude to approximately 50mV.

In the case of low V

and high V

OUT

, larger values of CFB

may be needed, perhaps 4.7pF or higher. If using the

SOT23-6 package (SC120SKTRT) with low V

and high V

OUT

at least 10pF to 12pF is recommended.

The Enable Pin

The EN pin is a high impedance logical input that can be

used to enable or disable the SC120 under processor

control. V

< 0.2V will disable regulation, set the LX pin in

a high-impedance state (turn off both FET switches), and

turn on an active discharge device to discharge the output

capacitor via the OUT pin. V

> 0.85V will enable the

output. The startup sequence from the EN pin is identical

to the startup sequence from the application of input

power.

Regulator Startup, Short Circuit Protection, and

Current Limits

The SC120 permits power up at input voltages from 0.85V

to 4.5V. Startup current limiting of the internal switching

n-channel and p-channel FET power devices protects

them from damage in the event of a short between OUT

and GND. As the output voltage rises, progressively less-

restrictive current limits are applied. This protection

unavoidably prevents startup into an excessive load.

To begin, the p-channel FET between the LX and OUT pins

turns on with its current limited to approximately 150mA,

the short-circuit output current. When V

OUT

approaches V

(but is still below 1.7V), the n-channel current limit is set

to 350mA (the p-channel limit is disabled), the internal

oscillator turns on (approximately 200kHz), and a fixed

75% duty cycle PWM operation begins. (See the section

PWM Operation.) When the output voltage exceeds 1.7V,

fixed frequency PWM operation begins, with the duty

cycle determined by an n-channel FET peak current limit

of 350mA. When this n-channel FET startup current limit

is exceeded, the on-state ends immediately and the off-

state begins. This determines the duty cycle on a cycle-

by-cycle basis. When V

OUT

is within 2% of the programmed

regulation voltage, the n-channel FET current limit is

raised to 1.2A, and normal voltage regulation PWM control

begins.

Once normal voltage regulation PWM control is initiated,

the output becomes independent of V

and output regu-

lation can be maintained for V

as low as 0.7V, subject to

the maximum duty cycle and peak current limits. The duty

cycle must remain between 15% and 90% for the device

to operate within specification.

Note that startup with a regulated active load is not the

same as startup with a resistive load. The resistive load

output current increases proportionately as the output

voltage rises until it reaches programmed V

OUT

LOAD

, while

a regulated active load presents a constant load as the

output voltage rises from 0V to programmed V

OUT

. Note

also that if the load applied to the output exceeds an

applicable V

OUT

dependent startup current limit or duty

cycle limit, the criterion to advance to the next startup

stage may not be achieved. In this situation startup may

Applications Information (continued)

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