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AD9961 Datasheet(PDF) 33 Page - Analog Devices |
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AD9961 Datasheet(HTML) 33 Page - Analog Devices |
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33 / 60 page ![]() AD9961/AD9963 Rev. 0 | Page 33 of 60 Register Name Register Address Bit(s) Parameter Function 110: RXCML voltage. 111: not connected. Any write to this register initiates an ADC conversion cycle. Aux ADC MSBs 0x78 7:0 AUXADC[11:4] This is the 8 MSBs of the most recent AUXADC conversion result. Aux ADC LSBs 0x79 7:4 AUXADC[3:0] This is the 4 LSBs of the most recent AUXADC conversion result. 3 CONV_COMPL 0: indicates that the request auxiliary ADC conversion is in progress. 1: indicates that the auxiliary ADC conversion result is valid. 2:0 CHAN_SEL[2:0] Indicates the actual auxiliary ADC input channel selected for the conversion. This should match the channel that was selected in the write to Register 0x77 that initiated the conversion. Aux ADC CTRL 0 0x7A 7 AUXADC_EN 0: powers down the auxiliary ADC clock. 1: enables the auxiliary ADC clock. 6 AUXADC_RESB 1: resets the AUXADC. A transition from 0 to 1 triggers the reset. The bit should be returned to 0 after issuing the reset. 5:3 Unused 2:0 AUXDIV[2:0] Sets the frequency division ratio of the input clock driving the CLKP, CLKN pins over the AUXADCCLK. 000: 256. 001: 128. … 110: 4. 111: 2. The frequency of the AUXADCCLK should be less than 10 MHz. The sample conversion rate of the AUXADC is determined by the AUXCLK rate and CONV_TIME. Aux ADC CTRL 1 0x7B 7 TEMPSNS_EN 1: enables the on-chip temperature sensor. 6:5 Unused 4:2 AUXREF_ADJ[2:0] Adjustment for tuning the internal auxiliary ADC reference voltage. 011: +18 mV. 010: +12 mV. 001: +6 mV. 000: default. 111: −6 mV. 110: −12 mV. 101: −18 mV. 100: −24 mV. 1:0 Unused ADC Full-Scale Adj 0x7D 7:5 Unused 4:0 RX_FSADJ[4:0] This parameter adjusts the full-scale input voltage range of the Rx path ADCs. The peak-to-peak input voltage range can be set as follows: 10000: 1.25 V. 10001:1.27 V. 10010: 1.29 V. 10011: 1.31 V. … 11111: 1.54 V. 00000: 1.56 V. 00001: 1.58 V. … 01110: 1.873 V. 01111: 1.875 V. |
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