116A datasheet(61/102 Pages) RENESAS

61 / 102 page

REJ03B0297-0100

Rev.1.00

Page 61 of 99

Jul 16, 2010

R32C/116A Group

5. Electrical Characteristics

Note:

The device is operationally guaranteed under these operating conditions.

Figure 5.1

Clock Cycle Time

Table 5.5

Operating Conditions (4/5)

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted) (1)

Symbol

Characteristic

Value

Unit

Min.

Typ.

Max.

f(XIN)

Main clock oscillator frequency

416

MHz

f(XRef)

Reference clock frequency

MHz

f(PLL)

PLL clock oscillator frequency

128

MHz

f(Base)

Base clock frequency

MHz

tc(Base)

Base clock cycle time

15.625

f(CPU)

CPU operating frequency

MHz

tc(CPU)

CPU clock cycle time

15.625

f(BCLK)

Peripheral bus clock operating frequency

MHz

tc(BCLK)

Peripheral bus clock cycle time

31.25

f(PER)

Peripheral clock source frequency

MHz

f(XCIN)

Sub clock oscillator frequency

32.768

62.5

kHz

Base clock

(Internal signal)

t c(Base)

Peripheral bus clock

(Internal signal)

t c(BCLK)

CPU clock

(Internal signal)

t c(CPU)

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