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FM3116 Datasheet(PDF) 3 Page - Ramtron International Corporation

Part # FM3116
Description  Integrated Processor Companion with Memory
PDF  25 Pages
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Manufacturer  RAMTRON [Ramtron International Corporation]
Direct Link  http://www.ramtron.com
Logo RAMTRON - Ramtron International Corporation

FM3116 Datasheet(HTML) 3 Page - Ramtron International Corporation

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FM3104/16/64/256
Rev. 3.2
July 2010
Page 3 of 25
Figure 1. Block Diagram
Pin Descriptions
Pin Name
Type
Pin Description
A0, A1
Input
Device select inputs are used to address multiple memories on a serial bus. To select
the device the address value on the two pins must match the corresponding bits
contained in the device address. The device select pins are pulled down internally.
CNT1, CNT2
Input
Event Counter Inputs: These battery-backed inputs increment counters when an edge is
detected on the corresponding CNT pin. The polarity is programmable. These pins
should not be left floating. Tie to ground if pins are not used.
CAL/PFO
Output
In calibration mode, this pin supplies a 512 Hz square-wave output for clock
calibration. In normal operation, this is the early power-fail output.
X1, X2
I/O
32.768 kHz crystal connection. When using an external oscillator, apply the clock to
X1 and a DC mid-level to X2 (see Crystal Oscillator section for suggestions).
/RST
I/O
Active low reset output with weak pull-up. Also input for manual reset.
SDA
I/O
Serial Data & Address: This is a bi-directional line for the two-wire interface. It is
open-drain and is intended to be wire-OR’d with other devices on the two-wire bus.
The input buffer incorporates a Schmitt trigger for noise immunity and the output
driver includes slope control for falling edges. A pull-up resistor is required.
SCL
Input
Serial Clock: The serial clock line for the two-wire interface. Data is clocked out of the
part on the falling edge, and in on the rising edge. The SCL input also incorporates a
Schmitt trigger input for noise immunity.
PFI
Input
Early Power-fail Input: Typically connected to an unregulated power supply to detect
an early power failure. This pin should not be left floating.
VBAK
Supply
Backup supply voltage: A 3V battery or a large value capacitor. If VDD<3.6V and no
backup supply is used, this pin should be tied to VDD. If VDD>3.6V and no backup
supply is used, this pin should be left floating and the VBC bit should be set.
VDD
Supply
Supply Voltage
VSS
Supply
Ground
FRAM
Array
2-Wire
Interface
SCL
SDA
RST
A1, A0
CAL/PFO
PFI
VDD
VBAK
RTC
2.5V
-
+
RTC Registers
Event
Counters
CNT1
CNT2
Special
Function
Registers
S/N
X1
X2
LockOut
LockOut
+
-
1.2V
Watchdog
LV Detect
Switched Power
512Hz
RTC Cal.
Battery Backed
Nonvolatile



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