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EP3C55 Datasheet(PDF) 9 Page - Altera Corporation |
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EP3C55 Datasheet(HTML) 9 Page - Altera Corporation |
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9 / 34 page ![]() Chapter 1: Cyclone III Device Data Sheet 1–9 Electrical Characteristics © January 2010 Altera Corporation Cyclone III Device Handbook, Volume 2 Example 1–1 shows you the example to calculate the change of 50 Ω I/O impedance from 25°C at 3.0 V to 85°C at 3.15 V: Pin Capacitance Table 1–9 lists the pin capacitance for Cyclone III devices. Example 1–1. ΔR V = (3.15 – 3) × 1000 × –0.026 = –3.83 ΔR T = (85 – 25) × 0.262 = 15.72 Because ΔR V is negative, MF V = 1 / (3.83/100 + 1) = 0.963 Because ΔR T is positive, MF T = 15.72/100 + 1 = 1.157 MF = 0.963 × 1.157 = 1.114 R final = 50 × 1.114 = 55.71 Ω Table 1–9. Cyclone III Devices Pin Capacitance Symbol Parameter Typical – QFP Typical – FBGA Unit C IOTB Input capacitance on top/bottom I/O pins 7 6 pF C IOLR Input capacitance on left/right I/O pins 7 5 pF C LV DSLR Input capacitance on left/right I/O pins with dedicated LVDS output 87 pF C V REFLR (1) Input capacitance on left/right dual-purpose VREF pin when used as V REF or user I/O pin 21 21 pF C V REFTB (1) Input capacitance on top/bottom dual-purpose VREF pin when used as V REF or user I/O pin 23 (2) 23 (2) pF C CLKTB Input capacitance on top/bottom dedicated clock input pins 76 pF C CLKLR Input capacitance on left/right dedicated clock input pins 6 5 pF Notes to Table 1–9: (1) When VREF pin is used as regular input or output, a reduced performance of toggle rate and tCOis expected due to higher pin capacitance. (2) CVREFTB for EP3C25 is 30 pF. |
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