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LM49150 Datasheet(PDF) 20 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Part # LM49150
Description  Mono Class D Audio Subsystem with Earpiece Driver and Stereo Ground Referenced Headphone Amplifiers
PDF  28 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM49150 Datasheet(HTML) 20 Page - National Semiconductor (TI)

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TABLE 8. Volume Control Table
Volume Step
(1) xG4
xG3
xG2
xG1
xG0
(2) Gain (dB)
1
0
0
0
0
0
–80.00
2
0
0
0
0
1
–46.50
3
0
0
0
1
0
–40.50
4
0
0
0
1
1
–34.50
5
0
0
1
0
0
–30.00
6
0
0
1
0
1
–27.00
7
0
0
1
1
0
–24.00
8
0
0
1
1
1
–21.00
9
0
1
0
0
0
–18.00
10
0
1
0
0
1
–15.00
11
0
1
0
1
0
–13.50
12
0
1
0
1
1
–12.00
13
0
1
1
0
0
–10.50
14
0
1
1
0
1
–9.00
15
0
1
1
1
0
–7.50
16
0
1
1
1
1
–6.00
17
1
0
0
0
0
–4.50
18
1
0
0
0
1
–3.00
19
1
0
0
1
0
–1.50
20
1
0
0
1
1
0.00
21
1
0
1
0
0
1.50
22
1
0
1
0
1
3.00
23
1
0
1
1
0
4.50
24
1
0
1
1
1
6.00
25
1
1
0
0
0
7.50
26
1
1
0
0
1
9.00
27
1
1
0
1
0
10.50
28
1
1
0
1
1
12.00
29
1
1
1
0
0
13.50
30
1
1
1
0
1
15.00
31
1
1
1
1
0
16.50
32
1
1
1
1
1
18.00
(1.) x = M, L and R
(2.) Gain / Attenuation is from input to output
SHUTDOWN FUNCTION
The LM49150 features the following shutdown controls.
Bit B4 (GAMP_SD) of the SHUTDOWN CONTROL register
controls the gain amplifiers. When GAMP_SD = 1, it disables
the gain amplifiers that are not in use. For example, in Modes
1, 4 and 5, the Mono inputs are in use, so the Left and Right
input gain amplifiers are disabled, causing the I
DD to be min-
imized.
Bit B0 (PWR_On) of the SHUTDOWN CONTROL register is
the global shutdown control for the entire device. Set
PWR_On = 0 for normal operation. PWR_On = 1 overrides
any other shutdown control bit.
OUTPUT MODE CONTROL
In the LM49150 OUTPUT MODE CONTROL register (Table
4), Bit B5 (EP Bypass) controls the operation of the Earpiece
Bypass path. If EP Bypass = 0, it would act under normal out-
put mode operation set by bits B3, B2, B1, and B0. If EP
Bypass = 1, it overrides the B3, B2, B1, and B0 Bits and en-
ables the Receiver Bypass path, a class AB amplifier, to the
speaker output.
Bit B4 (HPR_SD) of the OUPUT MODE CONTROL register
controls the right headphone shutdown. If HPR_SD = 1, the
right headphone output is disabled.
DIFFERENTIAL AMPLIFIER EXPLANATION
The LM49150 features a differential input stage, which offers
improved noise rejection compared to a single-ended input
amplifier. Because a differential input amplifier amplifies the
difference between the two input signals, any component
common to both signals is cancelled. An additional benefit of
the differential input structure is the possible elimination of the
DC input blocking capacitors. Since the DC component is
common to both inputs, and thus cancelled by the amplifier,
the LM49150 can be used without input coupling capacitors
when configured with a differential input signal.
www.national.com
20



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