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MAX6872 Datasheet(PDF) 39 Page - Maxim Integrated Products |
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MAX6872 Datasheet(HTML) 39 Page - Maxim Integrated Products |
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39 / 48 page ![]() EEPROM-Programmable, Hex/Quad, Power-Supply Sequencers/Supervisors ______________________________________________________________________________________ 39 Table 24. Register Map (continued) REGISTER ADDRESS EEPROM MEMORY ADDRESS READ/ WRITE DESCRIPTION 2Dh 802Dh R/W PO6 (MAX6872)/PO4 (MAX6873) input selection—Product 1 (Table 16) 2Eh 802Eh R/W PO6 (MAX6872)/PO4 (MAX6873) input selection—Product 2 (Table 17) 2Fh 802Fh R/W PO6 (MAX6872)/PO4 (MAX6873) input selection—Product 2 (Table 17) 30h 8030h R/W PO6 (MAX6872)/PO4 (MAX6873) input selection—Product 2 (Table 17) 31h 8031h R/W PO6 (MAX6872)/PO4 (MAX6873) input selection—Products 1 and 2, PO_ timeout period, and output type selection (Tables 16, 21, 22, and 23) 32h 8032h R/W PO7 (MAX6872)/PO5 (MAX6873) input selection (Table 18) 33h 8033h R/W PO7 (MAX6872)/PO5 (MAX6873) input selection (Table 18) 34h 8034h R/W PO7 (MAX6872)/PO5 (MAX6873) input selection (Table 18) 35h 8035h R/W PO7 (MAX6872)/PO5 (MAX6873) input selection, PO_ timeout period, and output type selection (Tables 18, 21, 22, and 23) 36h 8036h R/W PO8 (MAX6872 only) input selection (Table 19) 37h 8037h R/W PO8 (MAX6872 only) input selection (Table 19) 38h 8038h R/W PO8 (MAX6872 only) input selection (Table 19) 39h 8039h R/W PO8 (MAX6872 only) input selection, PO_ timeout period, and output type selection (Tables 19, 21, 22, and 23) 3Ah 803Ah R/W Programmable output polarity (active high/active low) (Table 20) 3Bh 803Bh R/W GPI_ input polarity, PO5, PO6 (Tables 5, 15, and 17) 3Ch 803Ch R/W WD1 input selection and timeout enable (Table 25) 3Dh 803Dh R/W WD1 initial and normal timeout duration (Table 26) 3Eh 803Eh R/W WD2 input selection and timeout enable (Table 25) 3Fh 803Fh R/W WD2 initial and normal timeout duration (Table 26) 40h 8040h R/W MR input and programmable output behavior (Table 6) 41h 8041h R/W MARGIN and programmable output behavior (Table 7) 42h 8042h R/W Programmable output state with MARGIN assertion (Table 7) 43h 8043h R/W User EEPROM write disable (Table 29) 44h 8044h R/W Set to 0 45h 8045h R/W Configuration lock (Table 28) 46h 8046h — Reserved. Should not be overwritten. 47h 8047h — Reserved. Should not be overwritten. 48h 8048h — Reserved. Should not be overwritten. 49h 8049h — Reserved. Should not be overwritten. 4Ah 804Ah — Reserved. Should not be overwritten. 4Bh 804Bh — Reserved. Should not be overwritten. 4Ch 804Ch — Reserved. Should not be overwritten. 4Dh 804Dh — Reserved. Should not be overwritten. 4Eh 804Eh — Reserved. Should not be overwritten. 4Fh 804Fh — Reserved. Should not be overwritten. |
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