SN74LVC1GX04DBVT datasheet(8/19 Pages) TI1

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APPLICATION INFORMATION

Rs ≅ 1 kΩ

CL = 16 pF

C2 ≅ 32 pF

GND

CLOAD

RLOAD

RF ≅ 2.2 MΩ

C1 ≅ 32 pF

b) Oscillator Circuit in DBV or DCK Pinout

VCC

Practical Design Tips

SN74LVC1GX04

CRYSTAL OSCILLATOR DRIVER

SCES581B – JULY 2004 – REVISED DECEMBER 2006

Figure 3. Oscillator Circuit (continued)

• The open-loop gain of the unbuffered inverter decreases as power-supply voltage decreases. This decreases

the closed-loop gain of the oscillator circuit. The value of Rs can be decreased to increase the closed-loop

gain, while maintaining the power dissipation of the crystal within the maximum limit.

• R

s and C2 form a low-pass filter and reduce spurious oscillations. Component values can be adjusted, based

on the desired cutoff frequency.

• C

2 can be increased over C1 to increase the phase shift and help in start-up of the oscillator. Increasing C2

may affect the duty cycle of the output voltage.

• At high frequency, phase shift due to R

s becomes significant. In this case, Rs can be replaced by a capacitor

to reduce the phase shift.

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SN74LVC1GX04DBVT Datasheet(PDF) 8 Page - Texas Instruments