FS714x

6.0 Programming Information

All register bits are cleared to zero on power-up. All register bits may be read back as written.

Table 3: FS7140 Register Map

Address

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

Reserved

(Bit 63)

Reserved

(Bit 62)

Reserved

(Bit 61)

Reserved

(Bit 60)

Reserved

(Bit 59)

Reserved

(Bit 58)

Reserved

(Bit 57)

Reserved

(Bit 56)

Byte 7

Must be set to “0”

Must be set to “0”

Must be set to “0”

Must be set to “0”

Must be set to “0”

Must be set to “0”

Must be set to “0”

Must be set to “0”

Reserved

(Bit 55)

Reserved

(Bit 54)

SHUT2

(Bit 53)

Reserved

(Bit 52)

Reserved

(Bit 51)

Reserved

(Bit 50)

Reserved

(Bit 49)

Reserved

(Bit 48)

Byte 6

Must be set to “0”

Must be set to “0”

0 = Normal

1 = Powered down

Must be set to “0”

Must be set to “0”

Must be set to “0”

Must be set to “0”

Must be set to “0”

Reserved

(Bit 47)

LC

(Bit 46)

LR[1]

(Bit 45)

LR[0]

(Bit 44)

Reserved

(Bit 43)

Reserved

(Bit 42)

CP[1]

(Bit 41)

CP[0]

(Bit 40)

Byte 5

Must be set to “0”

Loop filter cap

select

Loop filter resistor select

Must be set to “0”

Must be set to “0”

Charge pump current select

CMOS

(Bit 39)

FBKDSRC

(Bit 38)

FBKDIV[13]

(Bit 37)

FBKDIV[12]

(Bit 36)

FBKDIV[11]

(Bit 35)

FBKDIV[10]

(Bit 34)

FBKDIV[9]

(Bit 33)

FBKDIV[8]

(Bit 32)

0 = PECL

1 = CMOS

0 = VCO output

1 = Post divider

output

8192

4096

2048

1024

512

256

Byte 4

See Section 4.1.2 for disallowed FBKDIV values

FBKDIV[7]

(Bit 31)

FBKDIV[6]

(Bit 30)

FBKDIV[5]

(Bit 29)

FBKDIV[4]

(Bit 28)

FBKDIV[3]

(Bit 27)

FBKDIV[2]

(Bit 26)

FBKDIV[1]

(Bit 25)

FBKDIV[0]

(Bit 24)

128

64

32

16

8

4

2

1

Byte 3

See Section 4.1.2 for disallowed FBKDIV values

POST2[3]

(Bit 23)

POST2[2]

(Bit 22)

POST2[1]

(Bit 21)

POST2[0]

(Bit 20)

POST1[3]

(Bit 19)

POST1[2]

(Bit 18)

POST1[1]

(Bit 17)

POST1[0]

(Bit 16)

Byte 2

Modulus = N +1 (N = 0 to 11); See Table 8

Modulus = N +1 (N = 0 to 11); See Table 8

POST3[1]

(Bit 15)

POST3[0]

(Bit 14)

SHUT1

(Bit 13)

REFDSRC

(Bit 12)

REFDIV[11]

(Bit 11)

REFDIV[10]

(Bit 10)

REFDIV[9]

(Bit 9)

REFDIV[8]

(Bit 8)

Byte 1

Modulus = 1,2,4, or 8; See Table 8

0 = Normal

1 = Powered down

0 = Crystal

oscillator

1 = REF pin

2048

1024

512

256

REFDIV[7]

(Bit 7)

REFDIV[6]

(Bit 6)

REFDIV[5]

(Bit 5)

REFDIV[4]

(Bit 4)

REFDIV[3]

(Bit 3)

REFDIV[2]

(Bit 2)

REFDIV[1]

(Bit 1)

REFDIV[0]

(Bit 0)

Byte 0

128

64

32

16

8

4

2

1

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