R28 datasheet(366/473 Pages) RENESAS

366 / 473 page

R8C/28 Group, R8C/29 Group

19. Flash Memory

Rev.2.10

Sep 26, 2008

Page 347 of 441

REJ09B0279-0210

Figure 19.5 shows the FMR0 Register, Figure 19.6 shows the FMR1 Register and Figure 19.7 shows the FMR4

19.4.2.1

FMR00 Bit

This bit indicates the operating status of the flash memory. The bits value is 0 during programming, erasure

(including suspend periods), or erase-suspend mode; otherwise, it is 1.

19.4.2.2

FMR01 Bit

The MCU is made ready to accept commands by setting the FMR01 bit to 1 (CPU rewrite mode).

19.4.2.3

FMR02 Bit

Rewriting of block 0 and block 1 does not accept program or block erase commands if the FMR02 bit is set to 0

(rewrite disabled).

Rewriting of block 0 and block 1 is controlled by bits FMR15 and FMR16 if the FMR02 bit is set to 1 (rewrite

enabled).

19.4.2.4

FMSTP Bit

This bit is used to initialize the flash memory control circuits, and also to reduce the amount of current

consumed by the flash memory. Access to the flash memory is disabled by setting the FMSTP bit to 1.

Therefore, the FMSTP bit must be written to by a program transferred to the RAM.

In the following cases, set the FMSTP bit to 1:

• When flash memory access resulted in an error while erasing or programming in EW0 mode (FMR00 bit

not reset to 1 (ready))

• To provide lower consumption in high-speed on-chip oscillator mode, low-speed on-chip oscillator mode

(XIN clock stops), and low-speed clock mode (XIN clock stops).

Figure 19.11 shows the Process to Reduce Power Consumption in High-Speed On-Chip Oscillator Mode, Low-

Speed On-Chip Oscillator Mode (XIN Clock Stops) and Low-Speed Clock Mode (XIN Clock Stops). Handle

according to this flowchart. Note that when going to stop or wait mode while the CPU rewrite mode is disabled,

the FMR0 register does not need to be set because the power for the flash memory is automatically turned off

and is turned back on again after returning from stop or wait mode.

19.4.2.5

FMR06 Bit

This is a read-only bit indicating the status of an auto-program operation. The bit is set to 1 when a program

error occurs; otherwise, it is cleared to 0. For details, refer to the description in 19.4.5 Full Status Check.

19.4.2.6

FMR07 Bit

This is a read-only bit indicating the status of an auto-erase operation. The bit is set to 1 when an erase error

occurs; otherwise, it is set to 0. Refer to 19.4.5 Full Status Check for details.

19.4.2.7

FMR11 Bit

Setting this bit to 1 (EW1 mode) places the MCU in EW1 mode.

19.4.2.8

FMR15 Bit

When the FMR02 bit is set to 1 (rewrite enabled) and the FMR15 bit is set to 0 (rewrite enabled), block 0

accepts program and block erase commands.

19.4.2.9

FMR16 Bit

When the FMR02 bit is set to 1 (rewrite enabled) and the FMR16 bit is set to 0 (rewrite enabled), block 1

accepts program and block erase commands.

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