R28 datasheet(208/473 Pages) RENESAS

208 / 473 page

R8C/28 Group, R8C/29 Group

14. Timers

Rev.2.10

Sep 26, 2008

Page 189 of 441

REJ09B0279-0210

14.3.3.4

Forced Cutoff of Pulse Output

When using the timer mode’s output compare function, the PWM mode, or the PWM2 mode, pulse output from

the TRCIOj (j = A, B, C, or D) output pin can be forcibly cut off and the TRCIOj pin set to function as a

programmable I/O port by means of input to the INT0 pin.

A pin used for output by the timer mode’s output compare function, the PWM mode, or the PWM2 mode can be

set to function as the timer RC output pin by setting the Ej bit in the TRCOER register to 0 (timer RC output

enabled). If “L” is input to the INT0 pin while the PTO bit in the TRCOER register is set to 1 (pulse output

forced cutoff signal input INT0 enabled), bits EA, EB, EC, and ED in the TRCOER register are all set to 1

(timer RC output disabled, TRCIOj output pin functions as the programmable I/O port). When one or two

cycles of the timer RC operation clock after “L” input to the INT0 pin (refer to Table 14.11 Timer RC

Operation Clock) has elapsed, the TRCIOj output pin becomes a programmable I/O port.

Make the following settings to use this function.

• Set the pin state following forced cutoff of pulse output (high impedance (input), “L” output, or “H”

output) (refer to 7. Programmable I/O Ports).

• Set the INT0EN bit to 1 (INT0 input enabled) and the INT0PL bit to 0 (one edge) in the INTEN register.

• Set the PD4_5 bit in the PD4 register to 0 (input mode).

• Select the INT0 digital filter by means of bits INT0F1 to INT0F0 in the INTF register.

• Set the PTO bit in the TRCOER register to 1 (pulse output forced cutoff signal input INT0 enabled).

The IR bit in the INT0IC register is set to 1 (interrupt request) in accordance with the setting of the POL bit and

a change in the INT0 pin input (refer to 12.6 Notes on Interrupts).

For details on interrupts, refer to 12. Interrupts.

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