R5F36CAMDFB datasheet(70/94 Pages) RENESAS

70 / 94 page

REJ03B0277-0100 Rev.1.00 Jul.15, 2009

Page 68 of 90

M16C/6C Group

5. Electrical Characteristics

Figure 5.11

Timing Diagram

BCLK

CSi

ADi

ALE

25ns(max.)

0ns(min.)

Hi-Z

DBi

0ns(min.)

BHE

Read timing

40ns(min.)

Memory Expansion Mode and Microprocessor Mode

(in no wait state setting)

25ns(max.)

0ns(min.)

BCLK

CSi

ADi

ALE

BHE

40ns(max.)

0ns(min.)

DBi

Write timing

Hi-Z

= V

= 5 V

CC1

CC2

15ns(max.)

th(BCLK-CS)

tcyc

th(BCLK-AD)

0ns(min.)

td(BCLK-AD)

td(BCLK-ALE)

-4ns(min.)

th(RD-AD)

0ns(min.)

td(BCLK-RD)

th(BCLK-RD)

0ns(min.)

tac1(RD-DB)

(0.5

× t

-45)ns(max.)

cyc

tsu(DB-RD)

th(RD-DB)

th(BCLK-ALE)

25ns(max.)

td(BCLK-CS)

25ns(max.)

td(BCLK-CS)

25ns(max.)

0ns(min.)

th(BCLK-CS)

tcyc

25ns(max.)

0ns(min.)

15ns(max.)

td(BCLK-ALE)

-4ns(min.)

th(BCLK-ALE)

td(BCLK-AD)

th(BCLK-AD)

th(WR-AD)

(0.5

× t

-10)ns(min.)

cyc

td(BCLK-WR)

th(BCLK-WR)

td(BCLK-DB)

th(BCLK-DB)

td(DB-WR)

(0.5

× t

-40)ns(min.)

cyc

th(WR-DB)

(0.5

× t

-10)ns(min.)

cyc

Measuring conditions

= V

= 5 V

CC1

CC2

Input timing voltage: V = 0.8 V, V

= 2.0 V

Output timing voltage: V

= 0.4 V, V

= 2.4 V

f(BCLK)

R5F36CAMDFB Datasheet(PDF) 70 Page - Renesas Technology Corp

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