IP1206PBF datasheet(10/30 Pages) IRF

10 / 30 page

2/26/2008

www.irf.com

iP1206PbF

Circuit Description

THEORY OF OPERATION

Introduction

The iP1206 is a versatile device for high

performance buck converters. It consists of two

synchronous buck controllers which can be

operated either in a two independent outputs

mode or in a current share single output mode for

high current applications.

The timing of the IC is provided by an internal

oscillator circuit which generates two-180o-out-of-

phase clock that can be externally programmed

up to 600kHz per phase.

Under-Voltage Lockout

The under-voltage lockout circuit monitors four

signals (Vcc, Enable, VCH1, VCH2). This ensures

the correct operation of the converter during

power up and power down sequence. The driver

outputs remain in the off state whenever one of

these signals drops below set thresholds. Normal

operation resumes once these signals rise above

the set values. Fig. 6 shows a typical start up

sequence.

Enable

The enable features another level of flexibility for

start up. The Enable has precise threshold which

is internally monitored by an under-voltage

lockout circuit.

It’s threshold can be externally programmed to

desired level by using two external resistors, so

the converter doesn’t start up until the input

voltage has reached the specified threshold level

(see Fig. 6).

Fig. 6: Normal Start up, Enable threshold is externally set to 11V

Seq pin is pulled high prior to start up

Vcc

7.2V

Vout3

Enable

Vbus

7.25V

11V

12V

Enable OK (IC's POR)

Vcc OK

Seq

VIN

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