IR3522

Page 12

V3.01

An additional problem associated with peak or valley current mode control for voltage positioning is that they suffer

from peak-to-average errors. These errors will show in many ways but one example is the effect of frequency

variation. If the frequency of a particular unit is 10% low, the peak to peak inductor current will be 10% larger and

the output impedance of the converter will drop by about 10%. Variations in inductance, current sense amplifier

bandwidth, PWM prop delay, any added slope compensation, input voltage, and output voltage are all additional

sources of peak-to-average errors.

Current Sense Amplifier

A high speed differential current sense amplifier is located in the IR3506 phase IC, as shown in Figure 7. Its gain is

nominally 32.5 at 25ºC, and the 3850 ppm/ºC increase in inductor DCR should be considered when setting the

controller’s current limit.

The current sense amplifier can accept positive differential input up to 50 mV and negative up to -10 mV before

clipping. The output of the current sense amplifier is summed with the DAC voltage and sent to the control IC and

other phases through an on-chip 3K

resistor connected to the ISHARE pin. The ISHARE pins of all the phases are

tied together and the voltage on the share bus represents the average current through all the inductors and is used

by the control IC for current limit protection.

Average Current Share Loop

Current sharing between phases of the converter is achieved by the average current share loop in each phase IC.

The output of the current sense amplifier is compared with average current at the share bus. If a single phase

current is smaller than the average current, the phase IC share adjust amplifier will pull down the starting point of

the PWM ramp thereby increasing its duty cycle and output current. Conversely, a phase current larger than the

average current will pull up the PWM starting point decreasing its duty cycle and output current. The current share

amplifier is internally compensated so that the crossover frequency, of the current share loop, is much slower than

that of the voltage loop and the two loops do not interact.