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PCA9620 Datasheet(PDF) 19 Page - NXP Semiconductors |
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PCA9620 Datasheet(HTML) 19 Page - NXP Semiconductors |
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19 / 71 page ![]() PCA9620 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 9 December 2010 19 of 71 NXP Semiconductors PCA9620 Universal LCD driver for low multiplex rates Fig 11. Recommended power-down sequence when using an external supplied VLCD and the internal clock signal Fig 12. Recommended power-down sequence when using the internal charge pump and an external clock signal START Disable dis- play by setting bit E logic 0 Disable tem- perature mea- surement by setting bit TME logic 0 013aaa254 STOP Stop genera- tion of VLCD by setting bit CPE logic 0 START Disable dis- play by setting bit E logic 0 Disable tem- perature mea- surement by setting bit TME logic 0 013aaa255 STOP External clock may be switched off Bring pin CLK to 3-state by setting bit OSC and bit COE logic 0 |
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