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33931 Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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33931 Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
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4 / 21 page ![]() Analog Integrated Circuit Device Data 4 Freescale Semiconductor 33931 PIN CONNECTIONS 41 CCP Analog Output Charge Pump Capacitor External reservoir capacitor connection for the internal charge pump; connected to VPWR. Allowable values are 30 nF to 100 nF. Note: This capacitor is required for the proper performance of the device. 42 IN2 Logic Input Input 2 Logic input control of OUT2;e.g., when IN2 is logic HIGH, OUT2 is set to VPWR, and when IN2 is logic LOW, OUT2 is set to PGND. (Schmitt trigger Input with ~80 μA source so default condition = OUT2 HIGH.) 43 IN1 Logic Input Input 1 Logic input control of OUT1; e.g., when IN1 is logic HIGH, OUT1 is set to VPWR, and when IN1 is logic LOW, OUT1 is set to PGND. (Schmitt trigger Input with ~80 μA source so default condition = OUT1 HIGH.) 44 SF Logic Output - Open Drain Status Flag (Active Low) Open drain active LOW Status Flag output (requires an external pull-up resistor to VDD. Maximum permissible load current < 0.5 mA. Maximum VCEsat < 0.4 V @ 0.3 mA. Maximum permissible pull-up voltage < 7.0 V.) TAB AGND Analog Ground Analog Signal Ground The low-current analog signal ground must be connected to PGND via low- impedance path (<10 m Ω, 0 Hz to 20 kHz). Exposed TAB is also the main heatsinking path for the device. 12-33 N/C None No Connect Pin is not used Table 1. 33931 Pin Definitions (continued) A functional description of each pin can be found in the Functional Description section beginning on page 11. Pin Pin Name Pin Function Formal Name Definition |
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