Datasheet

14

Rev. 1.1, 2007-10-17

TLE 4299

Reset

The power on reset feature is necessary for a defined start of the microprocessor when

switching on the application. For the reset delay time after the output voltage of the

regulator is above the reset threshold, the reset signal is set High again. The reset delay

time is defined by the reset delay capacitor

C

The under-voltage reset circuitry supervises the output voltage. In case

V

below the reset threshold the reset output is set LOW after the reset reaction time. The

reset LOW signal is generated down to an output voltage

V

reaction time and the reset delay time is defined by the capacitor value.

The power on reset delay time is defined by the charging time of an external delay

capacitor

C

C

[1]

t

[2]

With

C

D

reset delay capacitor

t

d

reset delay time

=

V

I

ch

charge current typical 3.5

µA

For a delay capacitor

C

The reset reaction time

t

LOW after the output voltage has dropped below the reset threshold. It is typically 1.2

µs

for delay capacitor of 100 nF. For other values for

C

using the following equation:

t

[3]